參數(shù)資料
型號(hào)： ISP1761BE,551
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT425-1, LQFP-128
文件頁數(shù)： 109/164頁
文件大小： 767K
代理商： ISP1761BE,551
ISP1761_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 13 March 2008
48 of 163
NXP Semiconductors
ISP1761
Hi-Speed USB OTG controller
[1]
The reserved bits should always be written with the reset value.
8.3.7 ATL Done Timeout register
The bit description of the ATL Done Timeout register is given in Table 44.
8.3.8 Memory register
The Memory register contains the base memory read address and the respective bank.
This register needs to be set only before a rst memory read cycle. Once written, the
address will be latched for the bank and will be incremented for every read of that bank
until a new address for that bank is written to change the address pointer.
Bit
15
14
13
12
11
10
9
8
Symbol
reserved[1]
Reset
00000000
Access
R/W
Bit
7
6
5
4
3
2
1
0
Symbol
reserved[1]
ISO_BUF_
FILL
INT_BUF_
FILL
ATL_BUF_
FILL
Reset
000
0
Access
R/W
Table 43.
HcBufferStatus - Host Controller Buffer Status register (address 0334h) bit
description
Bit
Symbol
Description
31 to 3
-
reserved
2
ISO_BUF_FILL
ISO Buffer Filled:
1 — Indicates one of the ISO PTDs is lled, and the ISO PTD area will
be processed.
0 — Indicates there is no PTD in this area. Therefore, processing of
ISO PTDs will be completely skipped.
1
INT_BUF_FILL
INT Buffer Filled:
1 — Indicates one of the INT PTDs is lled, and the INT PTD area will
be processed.
0 — Indicates there is no PTD in this area. Therefore, processing of
INT PTDs will be completely skipped.
0
ATL_BUF_FILL
ATL Buffer Filled:
1 — Indicates one of the ATL PTDs is lled, and the ATL PTD area will
be processed.
0 — Indicates there is no PTD in this area. Therefore, processing of
ATL PTDs will be completely skipped.
Table 44.
ATL Done Timeout register (address 0338h) bit description
Bit
Symbol
Access
Value
Description
31 to 0
ATL_DONE_TIME
OUT[31:0]
R/W
0000 0000h ATL Done Timeout: This register determines the ATL done
time-out interrupt. This register denes the time-out in milliseconds
after which the ISP1761 asserts the INT line, if enabled. It is
applicable to ATL done PTDs only.
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