參數(shù)資料
型號(hào)： ISP1581BD
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 總線控制器
英文描述： Universal Serial Bus 2.0 high-speed interface device
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁(yè)數(shù)： 8/73頁(yè)
文件大小： 1819K
代理商： ISP1581BD
Philips Semiconductors
ISP1581
USB 2.0 HS interface device
Objective specification
Rev. 02 — 23 October 2000
8 of 73
9397 750 07648
Philips Electronics N.V. 2000. All rights reserved.
The ISP1581 has a fast general-purpose interface for communication with most types
of microcontrollers/processors. This Microcontroller Interface is configured by pins
BUS_CONF, MODE1 and MODE0 to accommodate most interface types. Two bus
configurations are available, selected via input BUS_CONF during power-up:
Generic Processor mode (BUS_CONF = 1):
–
AD[7:0]: 8-bit address bus (selects target register)
–
DATA[15:0]: 16-bit data bus (shared by processor and DMA)
–
Control signals: R/W and DS or RD and WR (selected via pin MODE0)
–
DMA interface (generic slave mode only): uses lines DATA[15:0] as data bus,
DIOR and DIOW as dedicated read and write strobes.
Split Bus mode (BUS_CONF = 0):
–
AD[7:0]: 8-bit local microprocessor bus (multiplexed address/data)
–
DATA[15:0]: 16-bit DMA data bus
–
Control signals: CS, ALE or A0 (selected via pin MODE1), R/W and DS or RD
and WR (selected via pin MODE0)
–
DMA interface (master or slave mode): uses DIOR and DIOW as dedicated read
and write strobes.
For high-bandwidth data transfer, the integrated DMA handler can be invoked to
transfer data to/from external memory or devices. The DMA Interface can be
configured by writing to the proper DMA registers (see
Section 9.4
).
The ISP1581 supports high-speed USB 2.0 and full-speed USB 1.1 signaling.
Detection of the USB signaling speed is done automatically.
ISP1581 has 8 kbytes of internal FIFO memory, which is shared among the enabled
USB endpoints.
There are 14 configurable data endpoints and 2 control endpoints. Any of the 14 data
endpoints can be separately enabled or disabled. The endpoint type (interrupt,
isochronous or bulk) and packet size of these endpoints can be individually
configured depending on the requirements of the application. Optional double
buffering increases the data throughput of the data endpoints.
The ISP1581 requires a single supply of 3.0 V or 5.0 V, depending on the I/O voltage.
It has 5.0 V tolerant I/O pads and has an internal 3.3 V regulator for powering the
analog transceiver. It supports bus-powered operation with a ‘suspend’ current below
500
μ
A.
The ISP1581 operates on a 12 MHz crystal oscillator. An integrated 40
×
PLL clock
multiplier generates the internal sampling clock of 480 MHz.
7.1 USB 2.0 transceiver
The analog transceiver interfaces directly to the USB cable via integrated termination
resistors. The high-speed transceiver requires an external resistor (12.2 k
±
0.1%)
between pin RREF and ground to ensure an accurate current mirror. A full-speed
transceiver is integrated as well. This makes the ISP1581 compliant with USB 2.0
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ISP1581BD-T 功能描述:IC USB CTRL HI-SPEED 64LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類(lèi)型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱(chēng):Q6396337A
ISP1582 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Hi-Speed Universal Serial Bus peripheral controller
ISP1582 PCI EVALKIT 功能描述:PCI BUS EVAL KIT ISP1582 RoHS:是 類(lèi)別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板
ISP1582BS 功能描述:IC USB CTRL HI-SPEED 56HVQFN RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 專(zhuān)用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤(pán)（4x4） 包裝:帶卷 (TR) 安裝類(lèi)型:表面貼裝 產(chǎn)品目錄頁(yè)面:1015 (CN2011-ZH PDF) 其它名稱(chēng):296-25223-2
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