參數(shù)資料
型號(hào): ISP1581BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Universal Serial Bus 2.0 high-speed interface device
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁(yè)數(shù): 13/73頁(yè)
文件大?。?/td> 1819K
代理商: ISP1581BD
Philips Semiconductors
ISP1581
USB 2.0 HS interface device
Objective specification
Rev. 02 — 23 October 2000
13 of 73
9397 750 07648
Philips Electronics N.V. 2000. All rights reserved.
9.1 Register access
Register access depends on the bus width used:
8-bit bus:
multi-byte registers are accessed lower byte (LSB) first.
16-bit bus:
for single-byte registers the upper byte (MSB) must be ignored.
Endpoint specific registers are indexed via the Endpoint Index register. The target
endpoint must be selected first, before accessing the following registers:
Buffer Length
Control Function
Data Port
Endpoint MaxPacketsize
Endpoint Type
Short Packet.
9.2 Initialization registers
9.2.1
Address register (address: 00H)
This register is used to set the USB assigned address and enable the USB device.
Table 5
shows the Address register bit allocation.
The DEVEN and DEVADDR bits will be cleared whenever a bus reset, a power-on
reset or a soft reset occurs.
In response to the standard USB request SET_ADDRESS, the firmware must write
the (enabled) device address to the Address register, followed by sending an empty
packet to the host. The
new
device address is activated when the host acknowledges
the empty packet.
Table 5:
Bit
Symbol
Reset
Bus reset
Access
Address register: bit allocation
7
DEVEN
0
0
R/W
6
5
4
3
2
1
0
DEVADDR[6:0]
00H
00H
R/W
Table 6:
Bit
7
6 to 0
Endpoint Configuration register: bit description
Symbol
Description
DEVEN
A logic 1 enables the device.
DEVADDR[6:0]
This field specifies the USB device address.
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