參數(shù)資料
型號: ISP1581BD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Universal Serial Bus 2.0 high-speed interface device
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 47/73頁
文件大?。?/td> 1819K
代理商: ISP1581BD
Philips Semiconductors
ISP1581
USB 2.0 HS interface device
Objective specification
Rev. 02 — 23 October 2000
47 of 73
9397 750 07648
Philips Electronics N.V. 2000. All rights reserved.
12.1.1
Template 1 (transmit waveform; device without captive cable)
The eye pattern in
Figure 7
defines the transmit waveform requirements for a hub
(measured at TP2) or a device without a captive
1
cable (measured at TP3). The
corresponding signal levels and timings are given in
Table 77
. Timings are given as a
percentage of the unit interval (UI), which represents the nominal bit duration T
PERIOD
for a 480 Mbit/s transmission rate.
[1]
[2]
In the unit interval following a transition.
In all other cases.
1.
Captive cables have a vendor-specific connector to the peripheral (hardwired or detachable) and a USB “A” connector on the other side.
For hot plugging, the vendor-specific connector must meet the same performance requirements as a USB “B” connector.
Fig 7.
Template 1 eye pattern (transmit waveform).
Table 77: Template 1 eye pattern definition
Name
Differential voltage on DP, DM
(mV)
+
525
[1]
+
475
[2]
525
[1]
475
[2]
0
0
+
300
+
300
300
300
Relative duration
(% of unit interval)
n.a.
Level 1
Level 2
n.a.
Point 1
Point 2
Point 3
Point 4
Point 5
Point 6
7.5
92.5
37.5
62.5
37.5
62.5
MBL206
level 1
level 2
point 3
point 4
point 2
point 1
point 5
0
100
relative duration
(% of unit interval)
400 mV
+
400 mV
0
0
100
100
200
300
400
500
600
differential
output
voltage
(mV)
200
300
400
500
600
point 6
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