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| 型號： | ISP1183BS,157 |
| 廠商： | ST-ERICSSON |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC32 |
| 封裝： | 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32 |
| 文件頁數(shù)： | 10/65頁 |
| 文件大?。?/td> | 306K |
| 代理商： | ISP1183BS,157 |
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ISP1183_2
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 02 — 7 June 2007
18 of 65
NXP Semiconductors
ISP1183
Low-power USB Peripheral Controller with DMA
7. The ISP1183 places the byte or word to be transferred on data bus lines because its
RD_N signal was asserted by the 8237.
8. The 8237 waits one DMA clock period and then de-asserts MEMW_N and IOR_N.
This latches and stores the byte or word at the desired memory location. It also
informs the ISP1183 that data on bus lines has been transferred.
9. The ISP1183 de-asserts the DREQ signal to indicate to the 8237 that DMA is no
longer needed. In single-cycle mode, this is done after each byte or word; in burst
mode following the last transferred byte or word of the DMA cycle.
10. The 8237 de-asserts the DACK_N output, indicating that the ISP1183 must stop
placing data on the bus.
11. The 8237 places bus control signals (MEMR_N, MEMW_N, IOR_N and IOW_N) and
address lines in 3-state and de-asserts the HRQ signal, informing the CPU that it has
released the bus.
12. The CPU acknowledges control of the bus by de-asserting HLDA. After activating bus
control lines (MEMR_N, MEMW_N, IOR_N and IOW_N) and address lines, the CPU
resumes the execution of instructions.
For a typical bulk transfer, the preceding process is repeated 64 times, once for each byte.
After each byte, the Address register in the DMA controller is incremented and the byte
counter is decremented.
10.3 DACK-only mode
DACK-only DMA mode is selected by setting bit DAKOLY in the Hardware Conguration
example of the ISP1183 in DACK-only DMA mode is given in Figure 10.
In DACK-only mode, the ISP1183 uses the DACK signal as data strobe. Input signals
RD_N and WR_N are ignored. This mode is used in CPU systems that have a single
address space for memory and I/O access. Such systems have no separate MEMW_N
and MEMR_N signals: the RD_N and WR_N signals are also used as memory data
strobes.
Table 9.
DACK-only mode: pin functions
Symbol
Description
I/O
Function
DREQ
DMA request
O
ISP1183 requests a DMA transfer
DACK
DMA acknowledge
I
DMA controller conrms the transfer; also functions
as data strobe
RD_N
read strobe
I
not used
WR_N
write strobe
I
not used
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相關(guān)代理商/技術(shù)參數(shù) |
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| ISP1183BSFA | 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1183BS-S | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS-T | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BSTM | 功能描述:IC USB INTERFACE W/DMA 32-HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1183PC | 制造商:ST-Ericsson 功能描述:Low Power Universal Serial Bus Peripheral Controller w/ DMA |
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