參數(shù)資料
型號(hào): IS66WVD409616ALL-7010BLI
元件分類: SRAM
英文描述: 4M X 16 PSEUDO STATIC RAM, 70 ns, PBGA54
封裝: 8 X 6 MM, MO-207, VFBGA-54
文件頁數(shù): 19/52頁
文件大?。?/td> 1128K
代理商: IS66WVD409616ALL-7010BLI
IS66WVD409616ALL
Advanced Information
26
Rev.00A | January 2010
www.issi.com - SRAM@issi.com
Refresh Configuration Register
The refresh configuration register (RCR) defines how the CellularRAM device performs
its transparent self refresh. Altering the refresh parameters can dramatically reduce
current consumption during standby mode. Table 8 describes the control bits used in
the RCR.
The RCR is accessed using CRE and A[19:18] = 00b, or through the configuration
register software access sequence with ADQ = 0000h on the third cycle (see “Registers”)
Bit Number
Definition
Remark
21-20
Reserved
Must be set to “0”
19 – 18
Register Select
00 = Select RCR
01 = Select DIDR
10 = Select BCR
17 – 7
Reserved
Must be set to “0”
6 – 5
Reserved
Setting is ignored
4
DPD
0 = DPD enable
1 = DPD disable (default)
3
Reserved
Must be set to “0”
2 – 0
Partial Refresh
000 = Full array (default)
001 = Bottom 1/2 array
010 = Bottom 1/4 array
011 = Bottom 1/8 array
100 = None of array
101 = Top 1/2 array
110 = Top 1/4 array
111 = Top 1/8 array
Table 8. Refresh Configuration Register
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