參數(shù)資料
型號(hào): IRMCK201
廠商: International Rectifier
英文描述: High Performance Configurable Digital AC Servo Control IC
中文描述: 高性能可配置數(shù)字交流伺服控制IC
文件頁(yè)數(shù): 46/62頁(yè)
文件大?。?/td> 566K
代理商: IRMCK201
IRMCK201
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
47
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Byte
Offset
0x42
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Bit Position
4
7
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2
1
0
SPARE
FltClr
DcBusM
Enb
FaultControl Write Register Map
Field
Name
DcBusMEnb
Access
(R/W)
Field Description
DC Bus monitor enable. 1 = Monitor DC bus voltage and generate
appropriate brake signal control and disable PWM output when
voltage fault conditions occur. GatekillFlt and OvrSpdFlt faults
cannot be disabled. DC bus voltage thresholds are as follows:
Overvoltage – 410V
Brake On – 380V
Brake Off – 360V
Nominal – 310V
Undervoltage off – 140V
Undervoltage – 120V
This bit clears all active fault conditions. The user should monitor
the FaultStatus read register group to determine fault status and set
this bit to “1” to clear any faults that have occurred. A fault condition
automatically clears the PwmEnbW and FocEnbW bits in the
SystemControl write register group. Note that this bit also directly
controls the output 2137 FLTCLR pin. After clearing a fault, the
user must explicitly set this bit to “0” to re-enable fault processing.
FaultControl Write Register Field Definitions
W
FltClr
W
S
S
V
V
P
P
W
M
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Byte
Offset
0x44
0x45
Bit Position
4
ModScl (LSBs)
(W)
7
6
5
3
2
1
0
ModScl (MSBs)
(W)
SVPWMScaler Write Register Map
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