參數(shù)資料
型號: IRMCK201
廠商: International Rectifier
英文描述: High Performance Configurable Digital AC Servo Control IC
中文描述: 高性能可配置數(shù)字交流伺服控制IC
文件頁數(shù): 40/62頁
文件大?。?/td> 566K
代理商: IRMCK201
IRMCK201
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
41
Field
Name
EncAngScl
Access
(R/W)
Field Description
This value should be set to ((MtrPoles / 2) * (4096 * 4096) /
(MaxEncCnt + 1), where MtrPoles is the number of motor
poles. The value is used to convert the encoder count to an
angle ranging from 0 - 4095 using the equation: Angle =
((MtrPoles / 2) * 4096 * (encoder count) / (MaxEncCnt + 1))
MOD 4096. (The current encoder count can be read from
the EncCntR feld of the QuadratureDecodeStatus read
register group.)
Encoder counter enable.
ZPULSE polarity. 1= load ZEncCnt on rising Z-pulse edge.
0= load ZEncCnt on falling Z-pulse edge.
ZPULSE count initialization enable. When this bit is set, the
encoder count is set to the ZEncCnt value at each Z-pulse
edge as determined by the ZPulsePol field.
PowerOn Reduced signal enable. Set this bit in the
EEPROM to enable EEPROM standalone initialization for a
wire-saving encoder. When this bit is set, the EEPROM
initialization uses the PwrOnHallA, PwrOnHallB, PwrOnHallC
bits instead of the HallA, HallB, HallC bits to determine initial
motor angle. (The Hall bits can be read from the
QuadratureDecodeStatus read register group.)
Reduced signal encoder enable. 1 = read Hall A/B/C fields
from encoder A/B/Z wires.
QuadratureDecode Write Register Field Definitions
W
CntEnb
ZPulsePol
W
W
ZPulseEnb
W
PwrOnRedSig
W
RedSig
W
P
P
w
w
m
m
C
C
o
o
n
n
f
f
i
i
g
g
R
R
e
e
g
g
i
i
s
s
t
t
e
e
r
r
G
G
r
r
o
o
u
u
p
p
(
(
Byte
Offset
0xC
0xD
0xE
0xF
W
r
r
i
i
t
t
e
e
R
R
e
e
g
g
i
i
s
s
t
t
e
e
r
r
s
s
)
)
Bit Position
4
Gate
SnsU
(W)
7
6
5
3
2
1
SD
(W)
0
Gatekill
Sns
(W)
SPARE
Gate
SnsL
(W)
SPARE
SPARE
PwmPeriod (LSBs)
(W)
SPARE
PwmConfig
(W)
PwmPeriod (MSBs)
(W)
PwmDeadTm
(W)
PwmConfig Write Register Map
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