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參數(shù)資料
| 型號： | IRMCK201 |
| 廠商： | International Rectifier |
| 英文描述： | High Performance Configurable Digital AC Servo Control IC |
| 中文描述： | 高性能可配置數(shù)字交流伺服控制IC |
| 文件頁數(shù)： | 42/62頁 |
| 文件大小： | 566K |
| 代理商： | IRMCK201 |
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IRMCK201
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
43
Field
Name
IfbOffsV
Access
(R/W)
Field Description
12-bit signed value for V phase current feedback offset. When the
IfbOffsEnb bit in the SystemControl write register group is "0" this
value is automatically added to each current measurement in
hardware.
12-bit signed value for W phase current feedback offset. When the
IfbOffsEnb bit in the SystemControl write register group is "0” this
value is automatically added to each current measurement in
hardware.
Rotating frame Id component current feedback scale factor. Constant
used to scale current measurements before they are used in the field
orientation calculation. This is a 15-bit fixed-point signed number with
10 fractional bits that ranges from –16 to + 16 + 1023 / 1024.
Rotating frame Iq component current feedback scale factor. Constant
used to scale current measurements before they are used in the field
orientation calculation. This is a 15-bit fixed-point signed number with
10 fractional bits that ranges from –16 to + 16 + 1023 / 1024.
CurrentFeedbackConfig Write Register Field Definitions
W
IfbOffsW
W
IdScl
W
IqScl
W
S
S
y
y
s
s
t
t
e
e
m
m
C
C
o
o
n
n
t
t
r
r
o
o
l
l
R
R
e
e
g
g
i
i
s
s
t
t
e
e
r
r
G
G
r
r
o
o
u
u
p
p
(
(
Byte
Offset
0x17
Enb
W
r
r
i
i
t
t
e
e
R
R
e
e
g
g
i
i
s
s
t
t
e
e
r
r
s
s
)
)
Bit Position
4
SPARE
7
6
5
3
2
1
Foc
EnbW
0
DcComp
IfbOffs
Enb
Reserved
Pwm
EnbW
SystemControl Write Register Map
Field
Name
PwmEnbW
Access
(R/W)
Field Description
PWM Enable bit. Setting this bit to 1 or 0 sets the IGBT gate control
signals to their active or inactive states. At power up the gate control
output signals remain in a high-Z state. After PwmEnbW is set for the
first time, the gate controls are driven to their active or inactive states
according to the value of PwmEnbW. A fault condition clears this bit
automatically in hardware.
Field Orientated Control Enable bit. Setting this bit to 1 enables the
FOC algorithm. Setting this bit to 0 resets the FOC algorithm and
causes zero output voltage to be applied to the motor. A fault
condition clears this bit automatically in hardware.
This field should is reserved and should be set to 0.
W
FocEnbW
W
Reserved
W
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