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參數(shù)資料
| 型號： | INTEL486 SX |
| 廠商： | Intel Corp. |
| 英文描述： | Emedded Ultra-Low Power INTEL486 SX Processor(嵌入式超低能量處理器) |
| 中文描述： | Emedded超低功耗英特爾486山西處理器（嵌入式超低能量處理器） |
| 文件頁數(shù)： | 17/38頁 |
| 文件大?。?/td> | 346K |
| 代理商： | INTEL486 SX |
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Embedded Ultra-Low Power Intel486 SX Processor
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Table 5. Output Pins
Name
Active Level
Output Signal
Floated During
Address Hold
Floated During
Bus Hold
During Stop Grant and
Stop Clock States
1
BREQ
HIGH
Previous State
HLDA
HIGH
As per HOLD
BE3#-BE0#
LOW
Previous State
PWT, PCD
HIGH
Previous State
W/R#, M/IO#, D/C#
HIGH/LOW
Previous State
LOCK#
LOW
HIGH (inactive)
PLOCK#
LOW
HIGH (inactive)
ADS#
LOW
HIGH (inactive)
BLAST#
LOW
Previous State
A3-A2
HIGH
Previous State
SMIACT#
LOW
Previous State
NOTES:
1.
The term “Previous State” means that the processor maintains the logic level applied to the signal pin just before the pro-
cessor entered the Stop Grant state. This conserves power by preventing the signal pin from floating.
Table 6. Input/Output Pins
Name
Active Level
Output Signal
Floated During
Address Hold
Floated During
Bus Hold
During Stop Grant and
Stop Clock States
1,2
D31-D0
HIGH
Level-Keeper
A31-A4
HIGH
Previous State
NOTES:
1.
The term “Level-Keeper” means that the processor maintains the most recent logic level applied to the signal pin. This con-
serves power by preventing the signal pin from floating. If a system component, other than the processor, temporarily drives
these signal pins and then floats them, the processor forces and maintains the most recent logic levels that were applied by
the system component.
2. The term “Previous State” means that the processor maintains the logic level applied to the signal pin just before the pro-
cessor entered the Stop Grant state. This conserves power by preventing the signal pin from floating.
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