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參數(shù)資料
| 型號(hào)： | intel Pentium CPU |
| 廠商： | Intel Corp. |
| 英文描述： | 32 Bit CPU With MMX Technology and Mobile Module(32位帶MMX和移動(dòng)模塊處理器) |
| 中文描述： | 32位CPU的MMX技術(shù)和移動(dòng)模塊（32位帶MMX公司和移動(dòng)模塊處理器） |
| 文件頁(yè)數(shù)： | 20/36頁(yè) |
| 文件大小： | 395K |
| 代理商： | INTEL PENTIUM CPU |
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INTEL PENTIUM PROCESSOR WITH MMX TECHNOLOGY MOBILE MODULE
20
1/8/98 4:35 PM 24351502.DOC
Table 11. Connector Specifications
Parameter
Condition
Specification
Material
Contact
Copper Alloy
Housing
Thermo Plastic Molded Compound:
LCP
Electrical
Current
0.4 A
Voltage
50 VAC
Insulation Resistance
100M
min. @ 500 VDC
Termination Resistance
20m
max. @ 20mV open circuit
with 10mA
Capacitance
5pF max. Per contact
Mechanical
Mating Cycles
50 cycles
Connector Mating Force
0.9N (90gf) max. Per contact
Contact Un-mating Force
0.1N (10gf) min. Per contact
3.0.
FUNCTIONAL DESCRIPTION
3.1.
Intel Mobile Module
The Intel Mobile Module will support the Pentium
Processor with MMX Technology Mobile Processor
running at 166/66, 200/66, 233/66, and 266/66 MHz
with 16 KB on-chip code and data cache sizes.
3.2.
The Pentium Processor with MMX Technology
Mobile Processor’s internal cache is complimented
with a second-level 2.5V cache using a high-
performance pipeline burst SRAM. The L2 cache can
support up to 64 MB of system memory, the
maximum amount of cacheable system memory
supported by the 430TX PCIset system controller.
The Intel Mobile Module has two 100-pin TSOP (Thin
Small Outline Package) footprints for 512K direct-
mapped write-back L2 cache.
L2 Cache
The Intel Mobile Module supports the ZZ, or snooze
mode power management features in current pipeline
burst SRAM (PBSRAM). The PIIX4 ISA bridge
Southbridge component on the system electronics is
the source for the generation of ZZ mode. This ZZ
signal is named L2_ZZ on the Intel Mobile Module
interface, clarifying its sole purpose of ZZ support for
second-level cache.
3.3.
430TX PCIset System
Controller
Intel’s 430TX PCIset system controller is a highly
integrated device that combines the mobile Pentium
Processor bus controller, the DRAM controller,
second-level cache controller and PCI bus controller
into one component. The 430TX PCIset has multiple
power
management
features
notebook systems:
specifically
for
CLKRUN# is a feature that enables controlling of
the PCI clock on or off
430TX PCIset suspend modes include Suspend
to RAM (STR), Suspend to Disk (STD) and
Powered On Suspend (POS)
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