
INTEL PENTIUM PROCESSOR WITH MMX TECHNOLOGY MOBILE MODULE
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1/8/98 4:35 PM 24351502.DOC
1.0.
INTRODUCTION
The Intel
technology
building block for a system manufacturer to
incorporate into a notebook system. The Intel
Mobile Module incorporates an Intel Pentium
Processor
with MMX Technology Mobile Processor, second-
level cache, Intel 430TX PCIset Northbridge
system controller, voltage regulator, and thermal
sensor on a single printed circuit board.
Pentium
Mobile
processor
Module is the fundamental
with
MMX
Intel’s PCIset architecture allows for physical
partitioning at both the PCI and DRAM interfaces;
therefore the electrical interconnect defined for the
Intel Mobile Module includes the PCI bus, DRAM
memory bus and some PCIset sideband signals.
An onboard voltage regulator provides the DC
conversion from the system manufacturer’s DC
voltage to the processor’s core voltage and the
2.5V CPU interface signals. This isolation of the
processor voltage requirements allows the system
manufacturer to incorporate Intel Mobile Modules
with different processor variants into a notebook
system.
Building around this modular design gives the
system manufacturer these advantages:
Avoids complexities associated with designing
high-speed processor core logic boards
No requirement for manufacturing capabilities
of Tape Carrier Package (TCP) processors
Future Intel Mobile Modules provide an
upgrade path for notebook designs using a
standard interface
Eliminates the need to design for unique
voltage requirements over succeeding
generations of processors.
The 430TX PCIset (Northbridge) is one of two
physical VLSI devices that constitute the Intel
430TX PCIset controller. The second 430TX
device (Southbridge) is known as the PIIX4 ISA
bridge. The manufacturer’s system electronics,
which connects to the Intel Mobile Module, must
include a PIIX4 ISA bridge device. The PIIX4 ISA
bridge provides extensive power management
capabilities and is designed to support both the
430TX PCIset for current mobile Pentium
processors and the next Northbridge device for the
next generation of Intel mobile processors.
1.1.
Architecture Overview
The Intel Mobile Module is a small, highly
integrated assembly containing the Pentium
Processor with MMX Technology 166/200/233/266
MHz
Mobile
Processor
frequencies of 166/66, 200/66, 233/66, and 266/66
MHz and its immediate system-level support. The
module interfaces electrically to its host system via
a 3.3V PCI bus, a 3.3V memory bus, 2.5V CPU
interface signals, and the Intel 430TX PCIset
system controller.
with
internal/bus
The Intel Mobile Module includes a second-level
cache of pipeline burst SRAM with capabilities to
burst read/write at 3-1-1-1 and back-to-back burst
reads at 3-1-1-1-1-1-1-1. The module supports up
to 64 MB of cacheable system memory (non-PCI
memory)
and
ZZ
snooze
management.
mode
power
The Intel Mobile Module contains key features of
the Intel 430TX PCIset system controller. The
DRAM controller supports EDO at 3.3V with a
burst read at 5-2-2-2 (60ns) and SDRAM at 3.3V
with a burst read at 6-1-1-1 (66 MHz, CL=2). The
system controller provides a PCI CLKRUN# signal
to control memory clock on the PCI bus as well as
the internal clock control (also known as Chip
Standby
or Gated Clock). The SDRAM clock enables
support and self refresh of EDO or SDRAM during
Suspend mode and is fully compatible SMRAM
(C_SMRAM) and Extended SMRAM (E_SMRAM)
modes of power management; E_SMRAM mode
supports write-back cacheable SMRAM up to
1 MB. The Intel 430TX PCIset system controller is
a 3.3V PCI bus control which is compliant with PCI
Rev 2.1 specifications.
The processor core voltage regulation supports
input voltages from 5V to 20V (+5 percent)
enabling at or above 85 percent peak efficiencies
and de-couples processor voltage requirements
from the system.
The Intel Mobile Module incorporates Active
Thermal Feedback (ATF) sensing which is ACPI
Rev 1.0 compliant by including an internal A/D -
digital signaling (SMBUS) across the module
interface and a programmable trip point interrupt or
poll mode for reading temperature.