參數(shù)資料
型號(hào): IDT82V2052EPFG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 31/70頁
文件大?。?/td> 0K
描述: IC LIU E1 2CH SHORT HAUL 80-TQFP
標(biāo)準(zhǔn)包裝: 45
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-TQFP(14x14)
包裝: 托盤
其它名稱: 82V2052EPFG
IDT82V2052E
DUAL CHANNEL E1 SHORT HAUL LINE INTERFACE UNIT
PROGRAMMING INFORMATION
37
December 12, 2005
Table-14 Per Channel Register List and Map
Address (hex)
Register
R/W
MAP
CH1
CH2
b7
b6
b5
b4
b3
b2
b1
b0
Transmit and receive termination register
02
22
TERM
R/W
-
T_TERM2
T_TERM1
T_TERM0
R_TERM2
R_TERM1
R_TERM0
Jitter attenuation control register
03
23
JACF
R/W
-
JA_LIMIT
JACF1
JACF0
JADP1
JADP0
JABW
Transmit path control registers
04
24
TCF0
R/W
-
T_OFF
TD_INV
TCLK_SEL
T_MD1
T_MD0
05
25
TCF1
R/W
-
DFM_OFF
THZ
PULS3
PULS2
PULS1
PULS0
06
26
TCF2
R/W
-
SCAL5
SCAL4
SCAL3
SCAL2
SCAL1
SCAL0
07
27
TCF3
R/W
DONE
RW
UI1
UI0
SAMP3
SAMP2
SAMP1
SAMP0
08
28
TCF4
R/W
-
WDAT6
WDAT5
WDAT4
WDAT3
WDAT2
WDAT1
WDAT0
Receive path control registers
09
29
RCF0
R/W
-
R_OFF
RD_INV
RCLK_SEL
R_MD1
R_MD0
0A
2A
RCF1
R/W
-
EQ_ON
-
LOS4
LOS3
LOS2
LOS1
LOS0
0B
2B
RCF2
R/W
-
SLICE1
SLICE0
-
MG1
MG0
Network Diagnostics control registers
0C
2C
MAINT0
R/W
-
PATT1
PATT0
PATT_CLK
PRBS_INV
LAC
AISE
ATAO
0D
2D
MAINT1
-
RLP
ALP
DLP
0E-11
2E-31
MAINT2-
MAINT5
R/W
-
---
12
32
MAINT6
R/W
-
BPV_INS
ERR_INS
EXZ_DEF
ERR_SEL1
ERR_SEL0
CNT_MD
CNT_TRF
Interrupt control registers
13
33
INTM0
R/W
-
PRBS_IM
TCLK_IM
DF_IM
AIS_IM
LOS_IM
14
34
INTM1
R/W
DAC_OV_IM
JAOV_IM
JAUD_IM
ERR_IM
EXZ_IM
CV_IM
TIMER_IM
CNT_IM
15
35
INTES
R/W
-
PRBS_IES
TCLK_IES
DF_IES
AIS_IES
LOS_IES
Line status registers
16
36
STAT0
R
-
PRBS_S
TCLK_LOS
DF_S
AIS_S
LOS_S
17
37
STAT1
R
-
RLP_S
-
Interrupt status registers
18
38
INTS0
R
-
PRBS_IS
TCLK_LOS_IS
DF_IS
AIS_IS
LOS_IS
19
39
INTS1
R
DAC_OV_IS
JAOV_IS
JAUD_IS
ERR_IS
EXZ_IS
CV_IS
TMOV_IS
CNT_OV_IS
Counter registers
1A
3A
CNT0
R
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
1B
3B
CNT1
R
Bit15
Bit14
Bit13
Bit12
Bit11
Bit10
Bit9
Bit8
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