參數(shù)資料
型號(hào): IBM25EMPPC603EFG-100
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 100 MHz, RISC PROCESSOR, PQFP240
封裝: 32 X 32 MM, 4.10 MM HEIGHT, 0.50 MM PITCH, FP-240
文件頁數(shù): 17/42頁
文件大?。?/td> 509K
代理商: IBM25EMPPC603EFG-100
24
603e and EM603e Hardware Specification
SRESET
B14
Low
Input
SYSCLK
C09
Input
TA
H14
Low
Input
TBEN
C02
High
Input
TBST
A14
Low
I/O
TC[0–1]
A02, A03
High
Output
TCK
C11
Input
TDI
A11
High
Input
TDO
A12
High
Output
TEA
H13
Low
Input
TLBISYNC
C04
Low
Input
TMS
B11
High
Input
TRST
C10
Low
Input
TS
J13
Low
I/O
TSIZ[0–2]
A13, D10, B12
High
Output
TT[0–4]
B13, A15, B16, C14, C15
High
I/O
WT
D02
Low
Output
VDD2
F06, F08, F09, F11, G07, G10, H06, H08, H09, H11, J06, J08, J09,
J11, K07, K10, L06, L08, L09, L11
——
VOLTDETGND3
F03
Low
Output
Notes:
1. These are test signals for factory use only and must be pulled up to OVdd for normal machine operation.
2. OVdd inputs supply power to the I/O drivers and Vdd inputs supply power to the processor core.
3. NC (no-connect) in the PID6; internally tied to GND in the PID7v CBGA package to indicate to the power
supply that a low-voltage processor is present.
Table 12. Pinout Listing for the 255 CBGA Package (Continued)
Signal Name
Pin Number
Active
I/O
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