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參數資料
| 型號： | HSP50016-EV |
| 廠商： | Intersil Corporation |
| 英文描述： | DDC Evaluation Platform |
| 中文描述： | DDC的評估平臺 |
| 文件頁數： | 20/31頁 |
| 文件大?。?/td> | 209K |
| 代理商： | HSP50016-EV |
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3-217
15-14
Q Three-State Control
00 = Three-State Q
01 = Enable Q
1x = Auto Three-State Enable Q (during time slot)
13
Input Format
0 = Offset Binary
1 = Two’s Complement
12-0
IQCLK Rate Counter
Preload
I/QCLK Rate Counter Preload, Bits 12-0 = 2
12 ...
2
0
.
Range: 2
≤
IQCLK Rate Counter Preload
≤
1701.
To calculate the value in this field use this equation:
IQCLK Rate Counter Preload = [FLOOR[(HDF Decimation Factor x 4)/TSL] - 1]hex
; where FLOOR(x)
represents the integer part of x, and TSL is the decimal value of Control Word 3, bit 31-18.
TABLE 9. INPUT AND OUTPUT FORMAT REGISTER (Continued)
DESTINATION ADDRESS = 6
BIT
POSITION
FUNCTION
DESCRIPTION
TABLE 10. PHASE OFFSET REGISTER
DESTINATION ADDRESS = 7
BIT
POSITION
FUNCTION
DESCRIPTION
39-37
Address
111 = Control Word 7
36
Update
0 = Update Only This Control Register
1 = Update All Control Registers
35-14
Reserved
All Zeroes
13
Data
0 = Normal Data Input
1 = Force Input Data to 8000 Hex.
12-11
FIR
Accumulator Control
00 = Normal Accumulation - The accumulator is reset on every FIR cycle.
01 = No Accumulation -The accumulator is disabled.
10 = Continuous Accumulation -The accumulator is not reset on every FIR cycle. This test mode was cre-
ated to allow the user to perform the equivilent of a check sum test. A very long term test could be
run and an accumulated output would yeild a specific numeric value. If the answer differed, the part
is not functioning properly.
11 = Reserved
10
Q Strobe on Roll Over
0 = Q carries Normal Data
1 = Q Strobes When Phase Generator Rolls Over
9
Force Outputs
0 = Normal Output Response
1 = Force Outputs
8
IQCLK Forced Data
If Bit 9 = 1, Force IQCLK = Bit 8; Else Normal
7
IQSTB Forced Data
If Bit 9 = 1, Force IQSTB = Bit 7; Else Normal.
6
I Forced Data
If Bit 9 = 1, Force I = Bit 6; Else Normal.
5
Q Forced Data
If Bit 9 = 1, Force Q = Bit 5; Else Normal.
4
Sin/Cos Generator
Bypass
0 = Sin Cos Generator Normal,
1 = Bypass Sin Cos Generator; Sin = Cos = 0.fffff (approximately 1)
3
Scaling Multiplier
Bypass
0 = Scaling Multiplier Normal,
1 = Scale Factor = 1.
2
Reserved
Must be Zero for Proper Operation while Test Features are Enabled.
1
Wait For RAM Full
If Bit = 0, DDC will Output Data Normally after a Reset, which will Include Unpredictable Data in Data
RAMs. If Bit = 1, No Chip Output will Occur until Sufficient Data RAM Locations are Written.
0
Disable Overflow Pro-
tection
0 = Normal Operation
1 = Disable Overflow Protection
HSP50016
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相關代理商/技術參數 |
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|---|---|
| HSP50016GC-52 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50016JC-52 | 功能描述:上下轉換器 DIGITAL DOWN CONVERTER 44 PLCC, 52MHZ, COMM RoHS:否 制造商:Texas Instruments 產品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50016JC-5296 | 制造商:Rochester Electronics LLC 功能描述:TAPE AND REEL OF HSP50016JC-52 - Bulk |
| HSP50016JC-75 | 制造商:Rochester Electronics LLC 功能描述:DIGITAL DOWN CONVERTER 44 PLCC 75MHZ COMM - Bulk |
| HSP50016JI-52 | 制造商:Rochester Electronics LLC 功能描述:DIGITAL DOWN CONVERTER 44 PLCC, 52MHZ, COMM,INDS - Bulk |
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