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參數(shù)資料
| 型號(hào)： | HI5731BIBZ-T |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 4/17頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | CONV D/A 12BIT 100MSPS 28SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 設(shè)置時(shí)間： | 20ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 功率耗散（最大）： | 650mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC W |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸出數(shù)目和類型： | 2 電流，單極 |
| 采樣率（每秒）： | 100M |
| 其它名稱： | HI5731BIBZ-TDKR |
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12
Interfacing to the HSP45106 NCO-16
The HSP45106 is a 16-bit, Numerically Controlled Oscillator
(NCO). The HSP45106 can be used to generate various
modulation schemes for Direct Digital Synthesis (DDS)
applications. Figure 28 shows how to interface an HI5731 to
the HSP45106.
Interfacing to the HSP45102 NCO-12
The HSP45102 is a 12-bit, Numerically Controlled Oscillator
(NCO). The HSP45102 can be used to generate various
modulation schemes for Direct Digital Synthesis (DDS)
applications. Figure 29 shows how to interface an HI5731 to
the HSP45102.
This high level block diagram is that of a basic PSK
modulator. In this example the encoder generates the PSK
waveform by driving the Phase Modulation Inputs (P1, P0) of
the HSP45102. The P1-0 inputs impart a phase shift to the
carrier wave as defined in Table 2.
The data port of the HSP45102 drives the 12-bit HI5731
DAC which converts the NCO output into an analog
waveform. The output filter connected to the DAC can be
tailored to remove unwanted spurs for the desired carrier
frequency. The controller is used to load the desired center
frequency and control the HSP45102. The HI5731 coupled
with the HSP45102 make an inexpensive PSK modulator
with Spurious Free performance down to -76dBc.
Definition of Specifications
Integral Linearity Error, INL, is the measure of the worst
case point that deviates from a best fit straight line of data
values along the transfer curve.
Differential Linearity Error, DNL, is the measure of the
error in step size between adjacent codes along the
converter’s transfer curve. Ideally, the step size is 1 LSB from
one code to the next, and the deviation from 1 LSB is known
as DNL. A DNL specification of greater than -1 LSB
guarantees monotonicity.
Feedthru, is the measure of the undesirable switching noise
coupled to the output.
Output Voltage Full Scale Settling Time, is the time
required from the 50% point on the clock input for a full scale
step to settle within an
±1/
2 LSB error band.
Output Voltage Small Scale Settling Time, is the time
required from the 50% point on the clock input for a 100mV
step to settle within an 1/2 LSB error band. This is used by
applications reconstructing highly correlated signals such as
sine waves with more than 5 points per cycle.
Glitch Area, GE, is the switching transient appearing on the
output during a code transition. It is measured as the area
under the curve and expressed as a picoVolt-time
specification (typically pV-s).
Differential Gain,
AV, is the gain error from an ideal sine
wave with a normalized amplitude.
Differential Phase,
Φ, is the phase error from an ideal sine
wave.
Signal to Noise Ratio, SNR, is the ratio of a fundamental to
the noise floor of the analog output. The first 5 harmonics
are ignored, and an output filter of 1/2 the clock frequency is
used to eliminate alias products.
Total Harmonic Distortion, THD, is the ratio of the DAC
output fundamental to the RMS sum of the harmonics. The
first 5 harmonics are included, and an output filter of 1/2 the
clock frequency is used to eliminate alias products.
Spurious Free Dynamic Range, SFDR, is the amplitude
difference from a fundamental to the largest harmonically or
non-harmonically related spur. A sine wave is loaded into the
D/A and the output filtered at 1/2 the clock frequency to
eliminate noise from clocking alias terms.
Intermodulation Distortion, IMD, is the measure of the
sum and difference products produced when a two tone
input is driven into the D/A. The distortion products created
will arise at sum and difference frequencies of the two tones.
IMD can be calculated using the following equation:
TABLE 3. PHASE MODULATION INPUT CODING
P1
P0
PHASE SHIFT (DEGREES)
00
0
01
90
1
0
270
1
180
IMD
20Log (RMS of Sum and Difference Distortion Products)
RMS Amplitude of the Fundamental
()
-------------------------------------------------------------------------------------------------------------------------------------------------------.
=
HI5731
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| HI5731BIP | 功能描述:IC DAC 12BIT 100MSPS HS 28-PDIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時(shí)間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類型:* 采樣率（每秒）:* |
| HI5731BIPS2503 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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| HI5731-EVP | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
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