參數(shù)資料
型號(hào): HB56S864ESN-7
元件分類: DRAM
英文描述: 8M X 64 EDO DRAM MODULE, 70 ns, DMA168
封裝: DIMM-168
文件頁(yè)數(shù): 5/34頁(yè)
文件大?。?/td> 338K
代理商: HB56S864ESN-7
HB56S872ESN Series, HB56S864ESN Series
13
DC Characteristics (Ta = 0 to 70
°C, V
CC = 5.0 V ±5%, VSS = 0 V) (HB56S864ESN)
60 ns
70 ns
Parameter
Symbol Min
Max
Min
Max
Unit Test conditions
Notes
Operating current
I
CC1
1360 —
1200 mA
t
RC = min
1, 2
Standby current
I
CC2
64
64
mA
TTL interface
RAS, CAS = V
IH
Dout = High-Z
32
32
mA
CMOS interface
RAS, CAS
≥ V
CC –0.2 V
Dout = High-Z
RAS-only refresh current
I
CC3
1360 —
1200 mA
t
RC = min
2
Standby current
I
CC5
160
160
mA
RAS = V
IH, CAS = VIL
Dout = enable
1
CAS-before-RAS refresh
current
I
CC6
1360 —
1200 mA
t
RC = min
EDO page mode current
I
CC7
1200 —
1120 mA
t
HPC = min
1, 3
Input leakage current
I
LI
–10
10
–10
10
A
0 V
≤ Vin ≤ 5.5 V
Output leakage current
I
LO
–10
10
–10
10
A
0 V
≤ Vout ≤ 5.5 V
Dout = disable
Output high voltage
V
OH
2.4
V
CC
2.4
V
CC
V
High Iout = –2 mA
Output low voltage
V
OL
0
0.4
0
0.4
V
Low Iout = 2 mA
Notes: 1. I
CC depends on output load condition when the device is selected, ICC max is specified at the
output open condition.
2. Address can be changed once or less while
RAS = V
IL.
3. Address can be changed once or less while
CAS = V
IH.
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