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| 型號(hào)： | EVAL-ADUC7126QSPZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 102/108頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR ADUC7126 |
| 設(shè)計(jì)資源： | EVAL-ADUC7126 Schematic ADUC7126 Gerber Files |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | ADUC7126 |
| 所含物品： | 板 |
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Data Sheet
ADuC7124/ADuC7126
Rev. C | Page 93 of 108
Table 141. T0CON MMR Bit Descriptions
Bit
Value
Description
[31:8]
Reserved.
7
Timer0 enable bit.
Set by the user to enable Timer0.
Cleared by the user to disable Timer0 by
default.
6
Timer0 mode.
Set by the user to operate in periodic mode.
Cleared by the user to operate in free-running
mode. Default mode.
[5:4]
Clock select bits.
00
HCLK.
01
UCLK.
10
32.768 kHz.
11
Reserved.
[3:2]
Prescale.
00
Core clock/1. Default value.
01
Core clock/16.
10
Core clock/256.
11
Undefined. Equivalent to 00.
[1:0]
Reserved.
T0CLRI Register
Name:
T0CLRI
Address:
0xFFFF030C
Default Value:
0xFF
Access:
Write only
T0CLRI is an 8-bit register. Writing any value to this register
clears the interrupt.
Timer1 (General-Purpose Timer)
Timer1 is a general-purpose, 32-bit timer (count down or count
up) with a programmable prescaler. The source can be the 32 kHz
external crystal, the undivided system, the core clock, or P1.1
(maximum frequency 41.78 MHz). This source can be scaled by
a factor of 1, 16, 256, or 32,768.
The counter can be formatted as a standard 32-bit value or as
hours: minutes: seconds: hundredths.
Timer1 has a capture register (T1CAP) that can be triggered by
a selected IRQ source initial assertion. This feature can be used
to determine the assertion of an event more accurately than the
precision allowed by the RTOS timer when the IRQ is serviced.
Timer1 can be used to start ADC conversions.
09123-
137
32kHz OSCILLATOR
HCLK
UCLK
P1.0
IRQ[19:0]
PRESCALER
÷1, 16, 256,
OR 32,768
32-BIT
UP/DOWN
COUNTER
32-BIT
LOAD
TIMER1
VALUE
CAPTURE
TIMER1 IRQ
ADC CONVERSION
Figure 54. Timer1 Block Diagram
The Timer1 interface consists of five MMRs: T1LD, T1VAL,
T1CON, T1CLRI, and T1CAP.
T1LD Register
Name:
T1LD
Address:
0xFFFF0320
Default Value:
0x00000000
Access:
Read/write
T1LD is a 32-bit load register.
T1VAL Register
Name:
T1VAL
Address:
0xFFFF0324
Default Value:
0xFFFFFFFF
Access:
Read only
T1VAL is a 32-bit read-only register that represents the current
state of the counter.
T1CON Register
Name:
T1CON
Address:
0xFFFF0328
Default Value:
0x0000
Access:
Read/write
T1CON is the configuration MMR described in Table 142.
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