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參數(shù)資料
| 型號： | EVAL-AD7731EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Noise, High Throughput 24-Bit Sigma-Delta ADC |
| 中文描述： | 低噪聲，高吞吐量的24位Σ-Δ模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 42/44頁 |
| 文件大小： | 411K |
| 代理商： | EVAL-AD7731EB |
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AD7731
–42–
REV. 0
Bipolar Input Signals
As mentioned previously, some applications will require that the
AD7731 handle input signals that are negative with respect to
system ground. T he number of applications requiring this are
limited but with the addition of some external components the
AD7731 is capable of handling such signals. Figure 25 outlines
one approach to the problem.
T he example shown is a system that is driven from
±
5 V sup-
plies. In such a circuit, two issues must be addressed. T he first
is how to get the AD7731 to handle input voltages below ground
and the second is how to generate a suitable reference voltage
for the AD7731. T he circuit of Figure 25 attempts to address
these two issues simultaneously.
T he AD7731’s analog and digital supplies can be split such that
AV
DD
and DV
DD
can be at separate potentials and AGND and
DGND can also be at separate potentials. T he only stipulation
is that AV
DD
or DV
DD
must not exceed the AGND by 5.5 V. In
Figure 25, the DV
DD
is operated at +3 V which allows the AGND
to go down to –2.5 V with respect to system ground. T his
means that all logic signals to the part must not exceed 3 V with
respect to system ground. T he AV
DD
is operated at +2.5 V with
respect to system ground.
T he resistor string R1, R2 and R3 takes the
±
5 V supply voltage
and generates a differential voltage of nominally 5 V. Amplifiers
A1 and A2 buffer the resistor string voltages and provide the
AV
DD
and AGND voltages as well as the REF IN(+) and REF
IN(–) voltages for the AD7731. T he differential reference volt-
age for the part is +5 V. If the input voltage is from a transducer
excited by the
±
5 V, the AD7731 retains its ratiometric opera-
tion with this reference voltage varying in sympathy with the
analog input voltage.
T he values of the resistors in the resistor string are chosen as-
suming the maximum input voltage range of
±
1.28 V is applied
to the AD7731. T he minimum input voltage must be 1.2 V above
the AD7731’s AGND, while the maximum input voltage must be
0.95 V below the AD7731’s AV
DD
. For smaller input voltage
ranges, the resistor ratios in the resistor string can be changed
to allow a larger DV
DD
voltage. For example, if R1 = 3 k
,
R2 = 10 k
and R3 = 6.8 k
, the AV
DD
and AGND voltages
become +3.49 V and –1.56 V respectively. T his allows the
AD7731 to be used with a +3.6 V DV
DD
voltage while allowing
analog input ranges of
±
320 mV and below.
An alternate scheme is to generate the AV
DD
and AGND volt-
ages from regulators or Zener diodes driven from the +5 V and
–5 V supplies respectively. T he reference voltage for the part
can be generated from an AD780 whose GND pin is connected
to the AD7731’s AGND pin.
Figure 25. Bipolar Input Signals on the AD7731
+5V
–5V
SIGMA-
DELTA
MODULATOR
DV
DD
AD7731
SERIAL INTERFACE
AND CONTROL LOGIC
REGISTER BANK
CLOCK
GENERATION
PROGRAMMABLE
DIGITAL
FILTER
SIGMA-DELTA A/D CONVERTER
STANDBY
SYNC
MCLK IN
MCLK OUT
SCLK
CS
DIN
DOUT
RESET
RDY
POL
DGND
CALIBRATION
MICROCONTROLLER
REF IN(+)
AV
DD
AIN1(+)
AIN1(–)
SYSTEM
GROUND
+3V
A1
A2
+5V
–5V
+5V
–5V
R1
5k
R2
10k
R3
5k
1/2 OP284
OR 1/2 OP213
1/2 OP284
OR 1/2 OP213
REF IN(–)
AGND
ALL VOLTAGE VALUES ARE WITH
RESPECT TO SYSTEM GROUND.
BUFFER
PGA
S
M
100nA
AGND
100nA
AV
DD
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