參數(shù)資料
型號(hào)： EVAL-AD5383EB
廠商： Analog Devices, Inc.
英文描述： 32-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
中文描述： 32通道，3伏/ 5 V，單電源，12位，電壓輸出DAC
文件頁數(shù)： 36/40頁
文件大?。?/td> 1201K
代理商： EVAL-AD5383EB
AD5383
UTILIZING THE AD5383 FIFO
The AD5383 FIFO mode optimizes total system update rates in
applications where a large number of channels need to be
updated. FIFO mode is only available when parallel interface
mode is selected. The FIFO_EN pin is used to enable the FIFO.
The status of FIFO_EN is sampled during the initialization
sequence. Therefore, the FIFO status can only be changed by
resetting the device. In a telescope that provides for the cancel-
lation of atmospheric distortion, for example, a large number of
channels need to be updated in a short period of time. In such
Rev. 0 | Page 36 of 40
systems, as many as 320 channels need to be updated within
25 μs to 30 μs. Three-hundred-twenty channels require the use
of 10 AD5383s. With FIFO mode enabled, the data write cycle
time is 40 ns; therefore each group consisting of 32 channels can
be fully loaded in 1.28 μs. In FIFO mode, a complete group of
32 channels updates in 11.5 μs. The time taken to update all 320
channels is 11.5 μs + 9 × 1.28 μs = 23 μs. Figure 44 shows the
FIFO operation scheme.
GROUP A
CHNLS 0-31
GROUP B
CHNLS 32-63
GROUP C
CHNLS
64-95
GROUP D
CHNLS
96-127
GROUP E
CHNLS
128-159
GROUP F
CHNLS
160-191
GROUP G
CHNLS
192-223
GROUP H
CHNLS
224-255
GROUP I
CHNLS
256-287
GROUP J
CHNLS
288-319
TIME TO UPDATE 320 CHANNELS = 23
μ
s
1.28
μ
s
11.5
μ
s
11.5
μ
s
1.28
μ
s
FIFO DATA LOAD
GROUP A
FIFO DATA LOAD
GROUP B
OUTPUT UPDATE
TIME FOR GROUP A
1.28
μ
s
11.5
μ
s
FIFO DATA LOAD
GROUP J
OUTPUT UPDATE
TIME FOR GROUP J
OUTPUT UPDATE
TIME FOR GROUP B
0
Figure 44. Using FIFO Mode 320 Channels Updated in under 25 μs
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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