7–86
Altera Corporation
Stratix II Device Handbook, Volume 2
January 2008
JTAG Configuration
Figure 7–35. JTAG Configuration of a Single Device Using a Download Cable
(1)
The pull-up resistor should be connected to the same supply voltage as the USB Blaster, MasterBlaster (VIO pin),
ByteBlaster II, or ByteBlasterMV cable.
(2)
The nCONFIG, MSEL[3..0] pins should be connected to support a non-JTAG configuration scheme. If only JTAG
configuration is used, connect nCONFIG to VCC, and MSEL[3..0] to ground. Pull DCLK either high or low,
whichever is convenient on your board.
(3)
Pin 6 of the header is a VIO reference voltage for the MasterBlaster output driver. VIO should match the device’s
cable, this pin is a no connect. In the USB Blaster and ByteBlaster II cables, this pin is connected to nCE when it is
used for active serial programming, otherwise it is a no connect.
(4)
nCE
must be connected to GND or driven low for successful JTAG configuration.
To configure a single device in a JTAG chain, the programming software
places all other devices in bypass mode. In bypass mode, devices pass
programming data from the TDI pin to the TDO pin through a single
bypass register without being affected internally. This scheme enables the
programming software to program or verify the target device.
Configuration data driven into the device appears on the TDO pin one
clock cycle later.
The Quartus II software verifies successful JTAG configuration upon
completion. At the end of configuration, the software checks the state of
CONF_DONE
through the JTAG port. When Quartus II generates a (.jam)
file for a multi-device chain, it contains instructions so that all the devices
in the chain will be initialized at the same time. If CONF_DONE is not high,
the Quartus II software indicates that configuration has failed. If
nCE (4)
MSEL[3..0]
nCONFIG
CONF_DONE
VCC (1)
VCC
GND
VCC
GND
VCC
(2)
VCC (1)
10 k
Ω
10 k
Ω
10 k
Ω
10 k
Ω
nSTATUS
Pin 1
Download Cable
10-Pin Male Header
(JTAG Mode)
(Top View)
GND
TCK
TDO
TMS
TDI
10 k
Ω
GND
VIO (3)
(1)
Stratix II Device
nCE0
N.C.
TRST
VCC