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參數(shù)資料
| 型號(hào)： | DM9000A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Ethernet Controller with General Processor Interface |
| 中文描述： | 以太網(wǎng)控制器與通用處理器接口 |
| 文件頁數(shù)： | 37/56頁 |
| 文件大?。?/td> | 1744K |
| 代理商： | DM9000A |
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DM9000A
Ethernet Controller with General Processor Interface
When this bit is set to 1, it indicates that the 10Mbps cable
polarity is reversed. This bit is automatically set and cleared by
10BASE-T module
Preliminary datasheet
Version: DM9000A-DS-P03
Apr. 21, 2005
37
8.11 Power Down Control Register (PWDOR) - 19
Bit
Bit Name
19.15-19.
9
19.8
PD10DRV
19.7
PD100DL
19.6
PDchip
19.5
PDcom
19.4
PDaeq
19.3
PDdrv
19.2
PDedi
19.1
PDedo
19.0
PD10
*
when selected, the power down value is control by Register 20.0
8.12 (Specified config) Register – 20
Bit
Bit Name
Default
20.15
TSTSE1
0,RW
20.14
TSTSE2
0,RW
20.13
FORCE_TXSD
0,RW
Default
0, RO
Description
Reserved
Reserved
Read as 0, ignore on write
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
Vendor power down control test
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RW
Description
Vendor test select control
Vendor test select control
Force Signal Detect
1: force SD signal OK in 100M
0: normal SD signal.
Vendor test select control
Reserved
Read as 0, ignore on write
The polarity of MDI/MDIX value
1: MDIX mode
0: MDI mode
Auto-negotiation Loopback
1: test internal digital auto-negotiation Loopback
0: normal.
MDIX_CNTL force value:
When Mdix_down = 1, MDIX_CNTL value depend on the
register value.
AUTO-MDIX Down
20.12
20.11-20
.8
20.7
FORCE_FEF
Reserved
0,RW
0, RO
MDIX_CNTL MDI/MDIX,
RO
20.6
AutoNeg_lpbk
0,RW
20.5
Mdix_fix
Value
0, RW
20.4
Mdix_down
0,RW
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相關(guān)代理商/技術(shù)參數(shù) |
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| DM9000A_06 | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Ethernet Controller with General Processor Interface |
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