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參數(shù)資料
| 型號： | DA28F160S5-70 |
| 廠商： | INTEL CORP |
| 元件分類： | DRAM |
| 英文描述： | 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor |
| 中文描述： | 2M X 8 FLASH 5V PROM, 70 ns, PDSO56 |
| 封裝： | 16 X 23.70 MM, SSOP-56 |
| 文件頁數(shù)： | 10/50頁 |
| 文件大?。?/td> | 1220K |
| 代理商： | DA28F160S5-70 |
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28F160S5, 28F320S5
E
10
ADVANCE INFORMATION
Read Array, Status Register, query, and identifier
codes can be accessed through the CUI
independent
of
the
programming voltage on V
PP
enables successful
block
erasure,
program,
configuration. All functions associated with
altering memory contents
—block erase, program,
lock-bit configuration, status, and identifier
codes—are accessed via the CUI and verified
through the Status Register.
V
PP
voltage.
Proper
and
lock-bit
Commands are written using standard micro-
processor write timings. The CUI contents serve
as input to the WSM that controls the block
erase, programming, and lock-bit configuration.
The internal algorithms are regulated by the
WSM,
including
pulse
verification, and margining of data. Addresses
and data are internally latched during write
cycles. Writing the appropriate command outputs
array data, identifier codes, or Status Register
data.
repetition,
internal
Interface software that initiates and polls
progress of block erase, programming, and lock-
bit configuration can be stored in any block. This
code is copied to and executed from system
RAM during flash memory updates. After
successful completion, reads are again possible
via the Read Array command. Block erase
suspend allows system software to suspend a
block erase to read or write data from any other
block. Program suspend allows system software
to suspend a program to read data from any
other flash memory array location.
2.1
Data Protection
Depending on the application, the system
designer may choose to make the V
PP
power
supply switchable or hardwired to V
PPH
. The
device supports either design practice, and
encourages optimization of the processor-
memory interface.
When V
PP
≤
V
PPLK
, memory contents cannot be
altered. When high voltage is applied to V
PP
, the
two-step block erase, program, or lock-bit
configuration
command
protection from unwanted operations. All write
functions are disabled when V
CC
voltage is below
the write lockout voltage V
LKO
or when RP# is at
V
IL
. The device’s block locking capability
provides additional protection from inadvertent
code or data alteration.
sequences
provide
0608_05
Figure 4. Memory Map
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DA28F320J5-120 | 制造商:Intel 功能描述: 制造商:Intel 功能描述:NOR Flash, 2M x 16, 56 Pin, Plastic, SOP |
| DA28F320J5A120 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DA28F320J5A-120 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:5 Volt Intel StrataFlash? Memory |
| DA28F320S5-110 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
| DA28F320S5-90 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY |
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