參數(shù)資料
型號(hào): CYNSE70256
英文描述: Network Processing
中文描述: 網(wǎng)絡(luò)處理
文件頁數(shù): 71/126頁
文件大?。?/td> 3302K
代理商: CYNSE70256
CYNSE70032
Document #: 38-02042 Rev. *E
Page 71 of 126
13.8
The hardware diagram of the Search subsystem of eight devices is shown in
Figure 13-48
. The following are the parameters
programmed into the eight devices.
First seven devices (devices 0–6): CFG = 10101010, TLSZ = 01, HLAT = 000, LRAM = 0, and LDEV = 0.
Eighth device (device 7): CFG = 10101010, TLSZ = 01, HLAT = 000, LRAM = 1, and LDEV = 1.
Note
. All eight devices must be programmed with the same value of TLSZ and HLAT. Only the last device in the table must be
programmed with LRAM = 1 and LDEV = 1 (device number 7 in this case). All other upstream devices must be programmed with
LRAM = 0 and LDEV = 0 (devices 0 through 6 in this case).
Figure 13-49
shows the timing diagram for a Search command in the 272-bit-configured table of eight devices for device
number 0.
Figure 13-50
shows the timing diagram for a Search command in the 272-bit-configured table of eight devices for
device number 1.
Figure 13-51
shows the timing diagram for a Search command in the 272-bit-configured table of eight devices
for device number 7 (the last device in this specific table). For these timing diagrams, three 272-bit searches are performed
sequentially. The following Hit/Miss assumptions were made, as shown in
Table 13-19
.
272-bit Search on Tables Configured as ×272 and Using up to Eight CYNSE70032 Devices
100
101
110
111
4
5
6
7
Table 13-19. Hit/Miss Assumptions
Search Number
Device 0
Device 1
Devices 2–6
Device 7
1
2
3
Hit
Miss
Miss
Miss
Miss
Hit
Miss
Miss
Miss
Miss
Miss
Miss
Table 13-18. Shift of SSF and SSV from SADR
(continued)
HLAT
Number of CLK Cycles
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