參數(shù)資料
型號(hào): CY7C9689-AC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: TAXI Compatible HOTLink Transceiver
中文描述: 1 CHANNEL(S), 200M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝: PLASTIC, TQFP-100
文件頁(yè)數(shù): 45/48頁(yè)
文件大?。?/td> 1009K
代理商: CY7C9689-AC
CY7C9689
45
Receive FIFO Reset Sequence
The Receive FIFO reset sequence operates (for the most part)
the same as the Transmit FIFO reset sequence. The same
requirements exist for the assertion state of RXRST and se-
lection of the interface. A sample Receive FIFO reset se-
quence is shown in
Figure 16
. Upon recognition of a Receive
FIFO reset, the Receive FIFO flags are forced to indicate an
EMPTY state to prohibit additional reads from the FIFO. Unlike
the Transmit FIFO, where the internal completion of the reset
operation is shown by first going FULL and later going EMPTY
when the internal reset is complete, there is no secondary in-
dication of the completion of the internal reset of the Receive
FIFO. The Receive FIFO is usable as soon as new data is
placed into it by the Receive Control State Machine.
Figure 15. Invalid Transmit FIFO Reset Sequence with TXEN Asserted
TXCLK
TXRST
Tx_RstM atch
Tx_FIFO_Reset
TXFULL
TXEN
CE
Tx_M atch
[49]
[49]
[49]
Note 48
Note 48
Not Full
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