參數(shù)資料
型號: CY7C43684
廠商: Cypress Semiconductor Corp.
英文描述: 16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(16K x36 x2 雙向同步先進先出帶總線匹配)
中文描述: 16K的x36 x2雙向同步FIFO瓦特/總線匹配(16K的x36 x2雙向同步先進先出帶總線匹配)
文件頁數(shù): 25/37頁
文件大?。?/td> 581K
代理商: CY7C43684
CY7C43624
CY7C43634/CY7C43644
CY7C43664/CY7C43684
25
PRELIMINARY
Notes:
43. D = Maximum FIFO Depth = 256 for the CY7C43624, 512 for the CY7C43634, 1K for the CY7C43644, 4K for the CY7C43664, and 16K for the CY7C43684.
44. t
is the minimum time between a rising CLKA edge and a rising CLKB edge for AFA to transition HIGH in the next CLKA cycle. If the time between the
rising CLKA edge and rising CLKB edge is less than t
, then AFA may transition HIGH one CLKB cycle later than shown.
45. If Port B size is word or byte, AFB is set LOW by the last word or byte write of the long word, respectively.
46. t
is the minimum time between a rising CLKB edge and a rising CLKA edge for AFB to transition HIGH in the next CLKB cycle. If the time between
the rising CLKB edge and rising CLKA edge is less than t
SKEW2
, then AFB may transition HIGH one CLKA cycle later than shown.
Switching Waveforms
(continued)
Timing for AFA when FIFO1 is Almost Full (CY Standard and FWFT Modes)
t
PAF
t
ENH
t
ENS
t
PAF
t
ENS
t
ENH
[D
(Y1+1)] Words in FIFO1
(D
Y1)Words in FIFO1
t
SKEW2[44]
CLKA
ENA
AFA
CLKB
ENB
[37, 43, 41]
t
PAF
t
ENH
t
ENS
t
PAF
t
ENS
t
ENH
[D
(Y2+1)] Words in FIFO2
(D
Y2)Words in FIFO2
t
SKEW2[46]
CLKB
ENB
AFB
CLKA
ENA
Timing for AFB when FIFO2 is Almost Full (CY Standard and FWFT Modes)
[43, 40, 45]
相關(guān)PDF資料
PDF描述
CY7C43636 512 x36/x18x2 Tri Bus FIFO(512 x36/x18x2 三路總線 先進先出)
CY7C43626 256 x36/x18x2 Tri Bus FIFO(256 x36/x18x2 三路總線先進先出)
CY7C43646 1K x36/x18x2 Tri Bus FIFO(1K x36/x18x2 三路總線 先進先出)
CY7C43666 4K x36/x18x2 Tri Bus FIFO(4K x36/x18x2 三路總線先進先出)
CY7C43686 16K x36/x18x2 Tri Bus FIFO(16K x36/x18x2 三路總線先進先出)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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