參數(shù)資料
型號: CY7C43662AV
廠商: Cypress Semiconductor Corp.
英文描述: 3.3V 4K x36 x2 Bidirectional Synchronous FIFO(3.3V 4K x36 x2 雙向同步先進先出)
中文描述: 3.3 4K的x36 x2雙向同步FIFO(3.3 4K的x36 x2雙向同步先進先出)
文件頁數(shù): 16/30頁
文件大?。?/td> 458K
代理商: CY7C43662AV
CY7C43642AV
CY7C43662AV/CY7C43682AV
16
PRELIMINARY
Note:
22. t
is the minimum time between a rising CLKB edge and a rising CLKA edge for EFA to transition HIGH in the next CLKA cycle. If the time between the
rising CLKB edge and rising CLKA edge is less than t
SKEW1
, then the transition of EFA HIGH may occur one CLKA cycle later than shown.
Switching Waveforms
(continued)
EFA Flag Timing and First Data Read when FIFO2 is Empty (CY Standard Mode)
t
CLKH
t
CLKL
t
ENS
t
ENH
t
ENS
t
ENH
t
A
t
DS
W1
LOW
t
DH
LOW
HIGH
FIFO2 Empty
LOW
LOW
LOW
W1
t
ENS
t
ENH
t
REF
t
REF
t
CLKH
t
CLKL
t
CLK
t
CLK
t
SKEW1[22]
CLKB
CSB
W/RB
MBB
ENB
FFB/IRB
B
0
35
CLKA
EFA/OFA
CSA
W/RA
MBA
ENA
A
0
35
相關PDF資料
PDF描述
CY7C43682AV 3.3V 16K x36 x2 Bidirectional Synchronous FIFO(3.3V 16K x36 x2 雙向同步先進先出)
CY7C43663AV 3.3V 4K x36 Unidirectional Synchronous FIFO w/ Bus Matching(3.3V 4K x36 單向同步先進先出帶總線匹配)
CY7C43683AV 3.3V 16K x36 Unidirectional Synchronous FIFO w/ Bus Matching(3.3V 16K x36 單向同步先進先出帶總線匹配)
CY7C43664AV 3.3V 4K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(3.3V 4K x36 x2 雙向同步先進先出帶總線匹配)
CY7C43644AV 3.3V 1Kx36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(3.3V 1K x36 x2 雙向同步先進先出帶總線匹配)
相關代理商/技術參數(shù)
參數(shù)描述
CY7C43663-15AC 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C43664-7AC 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C43682-15AC 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C43683-10AI 制造商:Rochester Electronics LLC 功能描述:- Bulk
CY7C43683AV-15AC 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 36 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V SYNC FIFO W/BUS MATCHING 16K X36 (NOT IDT COMPAT) - Bulk