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參數(shù)資料
| 型號： | CY28346 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Clock Synthesizer with Differential CPU Outputs |
| 中文描述： | 時鐘合成器的差分輸出的CPU |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 179K |
| 代理商： | CY28346 |
CY28346
Document #: 38-07331 Rev. *B
Page 5 of 20
Byte 6: Silicon Signature Register
[4]
(all bits are Read-only)
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
1
0
0
1
1
Pin#
Description
Revision = 0001
Vendor Code = 0011
Byte 7: Reserved Register
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Pin#
Description
Reserved. Set = 0.
Reserved. Set = 0.
Reserved. Set = 0.
Reserved. Set = 0.
Reserved. Set = 0.
Reserved. Set = 0.
Reserved. Set = 0.
Reserved. Set = 0.
Byte 8: Dial-a-Frequency Control Register N
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
0
0
0
0
Name
Description
Reserved. Set = 0.
These bits are for programming the PLL
’
s internal N register. This access allows the user to
modify the CPU frequency at very high resolution (accuracy). All other synchronous clocks
(clocks that are generated from the same PLL, such as PCI) remain at their existing ratios
relative to the CPU clock.
N6, MSB
N5
N4
N3
N2
N3
N0, LSB
Byte 9: Dial-a-Frequency Control Register R
Bit
7
6
5
4
3
2
1
@Pup
0
0
0
0
0
0
0
Name
Description
Reserved. Set = 0.
These bits are for programming the PLL
’
s internal R register. This access allows the user to
modify the CPU frequency at very high resolution (accuracy). All other synchronous clocks
(clocks that are generated from the same PLL, such as PCI) remain at their existing ratios
relative to the CPU clock.
R5, MSB
R4
R3
R2
R1
R0
DAF_ENB
0
0
R and N register mux selection. 0 = R and N values come from the ROM. 1 = data is loaded
from DAF (SMBus) registers.
Note:
4.
When writing to this register, the device will acknowledge the Write operation, but the data itself will be ignored.
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|---|---|
| CY28346OC | CONN BNC PLUG CRIMP RG-TFE-59,62 |
| CY28346OCT | CONN BNC PLUG CRIMP RG-59,62 |
| CY28346ZC | Clock Synthesizer with Differential CPU Outputs |
| CY28346ZCT | Clock Synthesizer with Differential CPU Outputs |
| CY28347 | HDC-HA-48-SVL1/29 RoHS Compliant: Yes |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY28346_05 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs |
| CY28346-2 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs |
| CY28346-2_05 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs |
| CY28346OC | 制造商:Rochester Electronics LLC 功能描述:FTG FOR INTEL 830M AND 845 CHIPSETS (CK-408) - Bulk |
| CY28346OCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs |
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