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參數(shù)資料
| 型號(hào)： | CY28346 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Clock Synthesizer with Differential CPU Outputs |
| 中文描述： | 時(shí)鐘合成器的差分輸出的CPU |
| 文件頁(yè)數(shù)： | 17/20頁(yè) |
| 文件大?。?/td> | 179K |
| 代理商： | CY28346 |
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CY28346
Document #: 38-07331 Rev. *B
Page 17 of 20
T
PZL
/T
PZH
Output Enable Delay
(All Outputs)
Output disable delay (all
outputs)
All Clock Stabilization
from Power-up
Stopclock Set-up Time
Stopclock Hold Time
Oscillator Start-up Time
1.0
10.0
1.0
10.0
1.0
10.0
1.0
10.0
ns
10
T
PZL
/T
PZH
1.0
10.0
1.0
10.0
1.0
10.0
1.0
10.0
ns
10
T
STABLE
3
3
3
3
ms
10
T
SS
T
SH
T
SU
10.0
0
10.0
0
10.0
0
10.0
0
ns
ns
ms
27
27
28
X
X
X
X
AC Parameters
(V
DD
= V
DDA
= 3.3V ±5%, T
A
= 0
°
C to +70
°
C) (continued)
Parameter
Description
66 MHz
Min.
100 MHz
Min.
133 MHz
Min.
200 MHz
Min.
Unit
Notes
Max.
Max.
Max.
Max.
Table 9. Maximum Lumped Capacitive Output Loads
Clock
PCI Clocks
3V66 (0,1)
66B(0:2)
48MUSB Clock
48MDOT
REF Clock
Max Load
30
30
30
20
10
50
Units
pF
pF
pF
pF
pF
pF
Notes:
27. CPU_STP# and PCI _STP# set-up time with respect to any PCI_F clock to guarantee that the effected clock will stop or start at the next PCI_F clock
’
s rising edge
28. When crystal meets minimum 40
device series resistance specification.
29. Device is not affected, VTT_PWRGD# is ignored.
VID (0:3),
SEL (0,1)
VTT_PWRGD#
PWRGD
VDD Clock Gen
Clock State
Clock Outputs
Clock VCO
0.2-0.3mS
Delay
State 0
State 2
State 3
Wait for
VTT_GD#
Sample Sels
Off
Off
On
On
State 1
(Note A)
Figure 16. VTT_PWRGD# Timing
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY28346OC | CONN BNC PLUG CRIMP RG-TFE-59,62 |
| CY28346OCT | CONN BNC PLUG CRIMP RG-59,62 |
| CY28346ZC | Clock Synthesizer with Differential CPU Outputs |
| CY28346ZCT | Clock Synthesizer with Differential CPU Outputs |
| CY28347 | HDC-HA-48-SVL1/29 RoHS Compliant: Yes |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28346_05 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs |
| CY28346-2 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs |
| CY28346-2_05 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs |
| CY28346OC | 制造商:Rochester Electronics LLC 功能描述:FTG FOR INTEL 830M AND 845 CHIPSETS (CK-408) - Bulk |
| CY28346OCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Clock Synthesizer with Differential CPU Outputs |
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