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Universal Single-chip Clock Solution
for VIA P4M266/KM266 DDR Systems
CY28347
Cypress Semiconductor Corporation
Document #: 38-07352 Rev. *C
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised December 26, 2002
Features
Supports VIA P4M266/KM266 chipsets
Supports Pentium
4, Athlon
processors
Supports two DDR DIMMS
Provides
—
Two different programmable CPU clock pairs
—
Six differential DDR SDRAM pairs
—
Two low-skew/low-jitter AGP clocks
—
Six low-skew/low-jitter PCI clocks
—
One 48M output for USB
—
One programmable 24M or 48M for SIO
Dial-a-Frequency
and Dial-a-dB
features
Spread Spectrum for best electromagnetic interference
(EMI) reduction
SMBus-compatible for programmability
56-pin SSOP and TSSOP packages
Note:
1.
Pins marked with [*] have internal pull-up resistors. Pins marked with [**] have internal pull-down resistors.
Table 1. Frequency Selection Table
FS(3:0)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
CPU
66.80
100.20
120.00
133.33
72.00
105.00
160.00
140.00
77.00
110.00
180.00
150.00
90.00
100.00
200.00
133.33
AGP
66.80
66.80
60.00
66.67
72.00
70.00
64.00
70.00
77.00
73.33
60.00
60.00
60.00
66.67
66.67
66.67
PCI
33.40
33.40
30.00
33.33
36.00
35.00
32.00
35.00
38.50
36.67
30.00
30.00
30.00
33.33
33.33
33.33
Block Diagram
Pin Configuration
[1]
VSSR
XIN
*FS0/REF0
XOUT
VDDAGP
*MODE/AGP0
*SELP4_K7#/AGP1
*PCI_STP#
VSSAGP
**FS1/PCI_F
PCI1
*MULTSEL/PCI2
VSSPCI
PCI3
PCI4
VDDPCI
PCI5
*CPU_STP#
VSS48M
**FS3/48M
**FS2/24_48M
VDD48M
VDD
VSS
IREF
*PD#
SCLK
SDATA
VDDR
VSSC
CPUT/CPUOD_T
CPUC/CPUOD_C
VDDC
VDDI
CPUCS_C
VTTPWRGD#/REF1
CPUCS_T
VSSI
FBOUT
BUF_IN
DDRT0
DDRC0
DDRT1
DDRC1
VDDD
VSSD
DDRT2
DDRC2
DDRT3
DDRC3
VDDD
VSSD
DDRT4
DDRC4
DDRT5
DDRC5
C
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
PLL1
S2D
CONVERT
SMBus
CPUCS_T
CPUCS_C
VDDC
VDDI
CPUT/CPU0D_T
CPUC/CPU0D_C
SELP4_K7#
PCI(3:5)
PCI_F
FS1
REF(0:1)
VDDR
FS0
48M
24_48M
FBOUT
DDRT(0:5)
DDRC(0:5)
SCLK
SDATA
PD#
AGP(0:1)
VDDAGP
VDD48M
VDDD
XTAL
XOUT
XIN
FS2
PCI2
PCI1
VDDPCI
PLL2
/2
BUF_IN
REF0
FS3
MULTSEL
SELSDR_DDR#
CPU_STP#
PCI_STP#
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY28347ZC | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347ZCT | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OC | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OCT | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28349B | FTG for Intel Pentium 4 CPU and Chipsets |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28347OC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347ZC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY28347ZCT | 制造商:Rochester Electronics LLC 功能描述:FTG FOR VIA P4 CHIPSET - Tape and Reel |
| CY28349 | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets |
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