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參數(shù)資料
| 型號： | CY28347 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | HDC-HA-48-SVL1/29 RoHS Compliant: Yes |
| 中文描述： | 通用單芯片時鐘為威盛P4M266/KM266的DDR系統(tǒng)解決方案 |
| 文件頁數(shù)： | 18/22頁 |
| 文件大?。?/td> | 188K |
| 代理商： | CY28347 |
CY28347
Document #: 38-07352 Rev. *C
Page 18 of 22
P4 Processor SELP4_K7# = 1.
Power-down Deassertion (P4 Mode)
The power-up latency needs to less than 1.5mS.
PCI 33MHz
PWRDWN#
CPUT 133MHz
CPUC 133MHz
REF 14.318MHz
USB 48MHz
DDRT 133MHz
DDRC 133MHz
AGP 66MHz
Figure 13. Power-down Assertion Timing Waveform (in P4 Mode)
REF 14.318MHz
PCI 33MHz
PW RDW N#
CPUT 133MHz
CPUC 133MHz
AGP 66MHz
USB 48MHz
<1.5 msec
DDRT 133MHz
DDRC 133MHz
Figure 14. Power-down Deassertion Timing Waveform (in P4 Mode)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY28347ZC | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347ZCT | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OC | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OCT | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28349B | FTG for Intel Pentium 4 CPU and Chipsets |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28347OC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347ZC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY28347ZCT | 制造商:Rochester Electronics LLC 功能描述:FTG FOR VIA P4 CHIPSET - Tape and Reel |
| CY28349 | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets |
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