- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379006 > CY28347 (Cypress Semiconductor Corp.) HDC-HA-48-SVL1/29 RoHS Compliant: Yes PDF資料下載
參數(shù)資料
| 型號： | CY28347 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | HDC-HA-48-SVL1/29 RoHS Compliant: Yes |
| 中文描述： | 通用單芯片時鐘為威盛P4M266/KM266的DDR系統(tǒng)解決方案 |
| 文件頁數(shù)： | 4/22頁 |
| 文件大小： | 188K |
| 代理商： | CY28347 |
CY28347
Document #: 38-07352 Rev. *C
Page 4 of 22
Serial Data Interface
To enhance the flexibility and function of the clock synthesizer,
a two-signal serial interface is provided. Through the Serial
Data Interface, various device functions such as individual
clock output buffers, etc., can be individually enabled or
disabled.
The registers associated with the Serial Data Interface
initializes to their default setting upon power-up, and therefore
use of this interface is optional. Clock device register changes
are normally made upon system initialization, if any are
required. The interface can also be used during system
operation for power management functions.
Data Protocol
The clock driver serial protocol accepts Byte Write, Byte Read,
Block Write, and Block Read operation from the controller. For
Block Write/Read operation, the bytes must be accessed in
sequential order from lowest to highest byte (most significant
bit first) with the ability to stop after any complete byte has
been transferred. For Byte Write and Byte Read operations,
the system controller can access individual indexed bytes. The
offset of the indexed byte is encoded in the command code,
as described in
Table 4
.
The Block Write and Block Read protocol is outlined in
Table 5
while
Table 6
outlines the corresponding Byte Write and Byte
Read protocol. The slave receiver address is 11010010 (D2H).
Table 4. Command Code Definition
Bit
7
Description
0 = Block Read or Block Write operation
1 = Byte Read or Byte Write operation
Byte offset for Byte Read or Byte Write operation. For Block Read or Block Write operations, these bits
should be
“
0000000
”
(6:0)
Table 5. Block Read and Block Write Protocol
Block Write Protocol
Description
Block Read Protocol
Description
Bit
1
2:8
9
10
11:18
Bit
1
2:8
9
10
11:18
Start
Start
Slave address - 7 bits
Write
Acknowledge from slave
Slave address - 7 bits
Write
Acknowledge from slave
Command Code - 8 Bit
“
00000000
”
stands for block
operation
Acknowledge from slave
Byte Count - 8 bits
Acknowledge from slave
Data byte 0 - 8 bits
Acknowledge from slave
Data byte 1 - 8 bits
Acknowledge from slave
Data Byte N/Slave Acknowledge...
Data Byte N - 8 bits
Acknowledge from slave
Stop
Command Code - 8 Bit
“
00000000
”
stands for block
operation
Acknowledge from slave
Repeat start
Slave address - 7 bits
Read
Acknowledge from slave
Byte count from slave - 8 bits
Acknowledge
Data byte from slave - 8 bits
Acknowledge
Data byte from slave - 8 bits
Acknowledge
Data bytes from slave/Acknowledge
Data byte N from slave - 8 bits
Not Acknowledge
Stop
19
19
20
20:27
28
29:36
37
38:45
46
....
....
....
....
21:27
28
29
30:37
38
39:46
47
48:55
56
....
....
....
....
Table 6. Byte Read and Byte Write Protocol
Byte Write Protocol
Description
Byte Read Protocol
Description
Bit
1
2:8
9
Bit
1
2:8
9
Start
Start
Slave address - 7 bits
Write
Slave address - 7 bits
Write
相關PDF資料 |
PDF描述 |
|---|---|
| CY28347ZC | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347ZCT | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OC | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OCT | Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28349B | FTG for Intel Pentium 4 CPU and Chipsets |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY28347OC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347OCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Single-chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| CY28347ZC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY28347ZCT | 制造商:Rochester Electronics LLC 功能描述:FTG FOR VIA P4 CHIPSET - Tape and Reel |
| CY28349 | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:FTG for Intel㈢ Pentium㈢ 4 CPU and Chipsets |
發(fā)布緊急采購，3分鐘左右您將得到回復。