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參數(shù)資料
| 型號(hào)： | COP885BC |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 8-Bit CMOS ROM Based Microcontrollers with 2k Memory, Comparators, and CAN Interface(8位基于CMOS ROM帶2K存儲(chǔ)器，比較器和CAN接口的微控制器) |
| 中文描述： | 8位的CMOS基于ROM與2K內(nèi)存，比較器和CAN接口（8位基于ROM的帶2K的CMOS存儲(chǔ)器，比較器和CAN微控制器接口的微控制器） |
| 文件頁(yè)數(shù)： | 37/57頁(yè) |
| 文件大小： | 677K |
| 代理商： | COP885BC |
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Frame Formats
(Continued)
Comparators
The device has two differential comparators. Port L is used
for the comparators. The output of the comparators is multi-
plexed out to two pins. The following are the Port L assign-
ments:
L6
Comparator 2 output
L5
Comparator 2 negative input
L4
Comparator 2 positive input
L3
Comparator 2 negative input
L2
Comparator 1 output
L1
Comparator 1 negative input
L0
Comparator 1 positive input
Additionally the comparator output can be connected inter-
nally to the L-Port pin of the respective positive input and
thereby generate an interrupt using the L-Port interrupt
structure (neg/pos. edge, enable/disable).
Note that in Figure 34 pin L6 has a second alternate function
of supporting the PWM0 output. The comparator 2 output
MUST be disabled in order to use PWM0 output on L6.
Figure 34 shows the Comparator Block Diagram.
COMPARATOR CONTROL REGISTER (CMPSL) (00D3)
These bits reside in the Comparator Register
CMP2
SEL
Bit 7
The register contains the following bits:
CMP2SEL Selects which L port pin to use for comparator2
negative input. (CMP2SEL = 0 selects L5;
CMP2SEL = 1 selects pin L3).
CMP2OE
Enables
comparator
CMP2EN bit must be set to enable this function.
CMP2RD
Reads
comparator
(CMP2EN=1) Read-only, reads as a “0” if com-
parator not enabled.
CMP2EN
Enables comparator 2 (“1”=enable). If compara-
tor 2 is disabled the associated L-pins can be
used as standard I/O.
CMP1OE
Enables
comparator
CMP1EN bit must be set to enable this function.
CMP1RD
Reads
comparator
(CMP1EN=1) Read-only, reads as a “0” if com-
parator not enabled.
CMP2
OE
CMP2
RD
CMP2
EN
CMP1
OE
CMP1
RD
CMP1
EN
Re-
served
Bit 0
2
output
(“1”=enable),
2
output
internally
1
output
(“1”=enable),
1
output
internally
DS012067-67
FIGURE 32. Resynchronization 1
DS012067-68
FIGURE 33. Resynchronization 2
C
www.national.com
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