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| 型號(hào)： | CIP3250A |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Component Interface Processor |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 7/44頁 |
| 文件大?。?/td> | 326K |
| 代理商： | CIP3250A |
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ADVANCE INFORMATION
CIP 3250A
7
Micronas
2. Functional Description
This section describes the functionality of the various
blocks shown in the block diagram of Fig. 2
–
1 in detail.
The CIP 3250A is controlled via an I
2
C bus interface. For
information regarding how to program the registers of
the CIP 3250A, please refer to the register list (see
Tables 2
–
9 and 2
–
10). The I
2
C bus interface uses sub-
addressing to access the register. In the following, I
2
C
registers are referenced by the sub-addresses given in
parenthesis; for example, I
2
C register <9>. To interface
correctly, a pin description for the CIP 3250A is given in
section 3.3.
2.1. Analog Front End
–
SCART-level inputs (RGB/YUV and
Fast Blank = 1.0 Vpp, Fast Blank must be ext. clipped)
–
triple 8-bit ADC for RGB/YUV
–
6 bit ADC for Fast Blank
–
sampling rate 13.5 to 20.25 MHz
–
no sync separation included
All analog video input signals and the analog Fast Blank
signal must be band limited to 5 MHz before analog to
digital conversion.
The CIP 3250A can process either analog YUV input
signals or analog RGB input signals which are AC-
coupled with a nominal input voltage level of 700 mV +
3 dB (1 V
PP
). There is no circuitry implemented for inter-
nal sync separation. Input voltage range of the Fast
Blank signal is 0 to 1 V. The Fast Blank input signal is
DC-coupled.
2.2. Clamping
–
internal clamping for RGB and YUV with adjustable
start and width
–
black level reference only during horizontal and verti-
cal blanking interval on RGB/YUV inputs
–
no proper clamping if sync is on G
In RGB mode, clamping takes place on black level (digi-
tal 16 or 8) using a clamping window as described below.
In YUV mode, clamping is done on black level (digital 16)
for Y (luma) and on saturation level zero (digital 128) for
UV (chroma) using a clamping window. Select between
RGB mode and YUV mode via I
2
C register <09>YUV.
The black level reference value (digital 16 or 8) can be
selected via I
2
C register <09>CLMPOFS. In a standard
DIGIT 2000 application without a conversion of Y (luma)
to ITUR code levels at the digital inputs (see section 2.9.
<10>YLEVEL), convert the black level to digital 32 via
I
2
C register <04>CLSEL.
The clamping window is programmable in reference to
the H-sync signal (see Fig. 2
–
13) by a start and stop val-
ue via I
2
C registers <18> and <19>. A window size of 32
or 64 sample clocks is recommended. Clamping is dis-
abled if start and stop values are equal after reset. Once
enabled it can not be switched off. Using a coupling ca-
pacitor of 220 nF, a hum of approximately 400 mV at
50 Hz can be compensated.
2.3. Matrix
–
matrix RGB
Y(R
–
Y)(B
–
Y):
Y = 0.299*R + 0.587*G + 0.114*B
(R
–
Y) = 0.701*R
–
0.587*G
–
0.114*B
(B
–
Y) =
–
0.299*R
–
0.587*G + 0.886*B
–
fixed coefficients with a resolution of 8 bits.
–
matrix enable/disable for analog RGB/YUV input pro-
grammable via I
2
C register
The matrix of the CIP 3250A converts the digitized RGB
signals to the intermediate signals Y, R
–
Y, and B
–
Y. En-
able the matrix via I
2
C register <04>MAON. The inter-
mediate signals at the output of the matrix can be con-
verted to YUV signals of the DIGIT 2000 system or to
YC
r
C
b
of the DIGIT 3000 system by the YUV control (see
section 2.4.). To omit conversion from RGB to
Y(R
–
Y)(B
–
Y), switch off the matrix and the CTBRST
block via I
2
C register <04>MAON and <04>CBSON.
2.4. YUV Control (on RGB-path only )
–
Y contrast (ct) and brightness (br) with rounding or
noise shaping and limiting to 8 bit:
Y = Y*ct + br
ct = 0...63/32 in 64 steps
br =
–
128...+127 in 256 steps
–
UV saturation (sat) with rounding or noise shaping and
limiting to 8 bit (controllable by CCU via I
2
C bus):
U
EXT
= (B
–
Y) * Usat
V
EXT
= (R
–
Y) * Vsat
Usat,Vsat = 0...63/32 in 64 steps
(U
INT
= [0.5*(B
–
Y)] * Usat
V
INT
= [0.875*(R
–
Y)] * Vsat)
Within the CTBRST block, switched on via I
2
C register
<04>CBSON, two different options can be used to con-
vert from (R
–
Y)(B
–
Y) to UV (PAL standard). In internal
mode (UV
INT
), conversion to PAL standard is done be-
fore the multiplication of the contents of the saturation
registers. Using the external mode (UV
EXT
) of
<04>SMODE, the user has to implement the conversion
factors via the two saturation registers (Usat, Vsat).
Since the two saturation registers can be programmed
separately, it is also very easy to convert to YC
r
C
b
(Stu-
dio standard) of the DIGIT 3000 system.
Contrast, brightness, and saturation can be adjusted for
the video signals of the analog input via I
2
C registers
<00> to <03>. A functional description of this circuit can
be found in figures 2
–
2 and 2
–
3 respectively.
To improve the amplitude resolution of the luma (Y) and
chroma (UV) video signals after multiplication with the
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