- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378829 > CH7009A-T (Electronic Theatre Controls, Inc.) Chrontel CH7009 DVI / TV Output Device PDF資料下載
參數(shù)資料
| 型號(hào)： | CH7009A-T |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Chrontel CH7009 DVI / TV Output Device |
| 中文描述： | 昆泰CH7009和DVI / TV輸出設(shè)備 |
| 文件頁數(shù)： | 35/46頁 |
| 文件大?。?/td> | 580K |
| 代理商： | CH7009A-T |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當(dāng)前第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
201-0000-035 Rev 1.1, 5/8/2000
35
CHRONTEL
Input Clock Register
CH7009A
IC
1Dh
8
Symbol:
Address:
Bits:
Bits 3-0 of register IC controls the delay applied to the XCLK signal before latching input data.
GPIO Control Register
Symbol:
Address:
Bits:
GPIO
1Eh
8
Bit 0 of register GPIO controls the polarity of the P-OUT signal. A value of ‘0’ does not invert the clock at the
output pad.
Bit 1 of register GPIO enables the P-OUT signal. A value of ‘1’ drives the P-OUT clock signal out of the
P-OUT / TLDET* pin. A value of ‘0’ disables the P-OUT signal.
Bit 2 of register GPIO enables the hot plug interrupt detection signal to be output from the P-OUT pin. A value of
‘1’ allows the hot plug detect circuit to pull the P-OUT / TLDET* pin low when a change of state has taken place on
the hot plug detect pin. A value of ‘0’ disables the interrupt signal. The two control bits HPIE and POUTE should
not be enabled (set to ‘1’) at the same time.
Bit 3 of register GPIO resets the hot plug detection circuitry. A value of ‘1’ causes the CH7009 to release the
P-OUT / TLDET* pin. When a hot plug interrupt is asserted by the CH7009 (P-OUT / TLDET) the CH7009 driver
should read register 20h to determine the state of the DVI termination. After having read this register, the HPIR bit
should be set high to reset the circuitry, and then set low again.
Bits 5-4 of register GPIO control the GPIO pins. When the corresponding GOENB bits are low, these register
values are driven out of the corresponding GPIO pins. When the corresponding GOENB bits are high, these register
values can be read to determine the level forced into the corresponding GPIO pins.
Bits 7-6 of register GPIO control the direction of the GPIO pins. A value of ‘1’ sets the corresponding GPIO pin to
an input, and a value of ‘0’ sets the corresponding pin to an output.
BIT:
7
6
5
4
3
2
1
0
SYMBOL:
Reserved Reserved Reserved Reserved
TYPE:
R/W
R/W
DEFAULT:
1
XCMD3
R/W
XCMD2
R/W
XCMD1
R/W
XCMD0
R/W
R/W
R/W
0
0
0
1
0
0
0
BIT:
7
6
5
4
3
2
1
0
SYMBOL:
GOENB1 GOENB0
TYPE:
R/W
DEFAULT:
GPIOL1
R/W
GPIOL0
R/W
HPIR
R/W
HPIE
R/W
POUTE
R/W
POUTP
R/W
R/W
1
1
0
0
0
0
0
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CH7303 | Chrontel CH7303 HDTV / DVI Encoder |
| CH8398A | TRUE-COLOR CHRONDAC WITH 16-BIT INTERFACE |
| CHF1206CNT | 20 W Power RF Chip Termination |
| CHF1206CNT500LY | 20 W Power RF Chip Termination |
| CHF1206CNT500LZ | 20 W Power RF Chip Termination |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CH7011A-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Consumer IC |
| CH7012 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Chrontel CH7012 TV Output Device |
| CH7012A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Chrontel CH7012 TV Output Device |
| CH7012A-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Chrontel CH7012 TV Output Device |
| CH7013A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。