- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄169479 > C9810AYB PROC SPECIFIC CLOCK GENERATOR, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | C9810AYB |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大?。?/td> | 332K |
| 代理商： | C9810AYB |
+/+
…when timing is critical
C9810
Low EMI Clock Generator for Intel
810 Chipset for Mobile Applications
Advanced Information
IMI Confidential
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev 0.4
8/31/1999
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
Page 12 of 15
http://www.imicorp.com
133 MHz Host
100 MHz Host
Symbol
Parameter
Min
Max
Min
Max
Units
Notes
TPeriod
REF period
69.8413
71.0
69.8413
71.0
nS
5, 6, 8
Tr / Tf
REF rise and fall times
1.0
4.0
1.0
4.0
nS
6, 7
TCCJ
REF Cycle to Cycle Jitter
-
1000
-
1000
pS
6, 8
tpZL, tpZH
Output enable delay (all outputs)
1.0
10.0
1.0
10.0
nS
13
tpLZ, tpZH
Output disable delay (all outputs)
1.0
10.0
1.0
10.0
nS
13
tstable
All clock Stabilization from power-up
3
mS
12
Tduty
Duty Cycle for All outputs
45
55
45
55
%
14
Note 5: This parameter is measured as an average over 1uS duration, with a crystal center frequency of 14.31818MHz
Note 6: All outputs loaded as per table 5 below. Probes are placed on the pins and taken at 1.5V levels for 3.3V signals and at
1.25V for 2.5V signals.
Note 7: Probes are placed on the pins, and measurements are acquired between 0.4V and 2.4V for 3.3V signals and between 0.4V
and 2.0V for 2.5V signals (see Fig.8A and Fig.8B)
Note 8: Probes are placed on the pins, and measurements are acquired at 1.5V for 3.3V signals and at 1.25V for 2.5V signals. (see
Figs.8A & 8B)
Note 9: This measurement is applicable with Spread ON or Spread OFF.
Note 10:Probes are placed on the pins, and measurements are acquired at 2.4V for 3.3V signals and at 2.0V for 2.5V signals, (see
Figs. 8A & 8B)
Note 11:Probes are placed on the pins, and measurements are acquired at 0.4V.
Note 12:The time specified is measured from when all VDD’s reach their respective supply rail (3.3V and 2.5V) till the frequency
output is stable and operating within the specifications
Note 13:Measured from when both SEL1 And SEL0 are low
Note 14: Device designed for Typical Duty Cycle of 50%.
Group Timing Relationships and Tolerances
Group
CPU 66MHz
Offset
CPU 66MHz
Tolerance
CPU 100MHz
Offset
CPU 100MHz
Tolerance
CPU 133MHz
Offset
CPU 133MHz
Tolerance
Conditions
CPU to SDRAM
2.5nS
500pS
5.0nS
500pS
0
500pS
Note 6
CPU to 3V66
7.5nS
500pS
5.0nS
500pS
0
500pS
CPU = 133.3MHz,
Notes 6, 7
SDRAM to 3V66
0
500pS
0
500pS
0
500pS
CPU = 133.3MHz,
Notes 6, 7
3V66 to PCI
1.5~2.5nS
500pS
1.5~2.5nS
500pS
1.5~2.5nS
500pS
CPU =
66.6/100/133.3MHz
Notes 6, 7
PCI to APIC
0
1.0nS
0
1.0nS
0
1.0nS
CPU =
66.6/100/133.3MHz
Notes 6, 7
USB to DOT
Async
N/A
Async
N/A
Async
N/A
CPU =
66.6/100/133.3MHz
Notes 6, 7
VDD=VDDS=3.3V
±5%, VDDC=VDDI=2.5±5%, TA=0 to 70C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| C9837AT | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| C9853AT | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| C9914BY | 150 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| C9PTSJ155.520EL | CRYSTAL OSCILLATOR, CLOCK, 155.52 MHz, LVPECL OUTPUT |
| C9PASH156.250 | CRYSTAL OSCILLATOR, CLOCK, 156.25 MHz, LVPECL OUTPUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| C9811X2AYB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU SYSTEM CLOCK GENERATOR|SSOP|56PIN|PLASTIC |
| C9812 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Low EMI Clock Generator for Intel 810E Chipset Systems |
| C9812DYB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU SYSTEM CLOCK GENERATOR|SSOP|56PIN|PLASTIC |
| C98130-A1231-C30 | 制造商:Siemens 功能描述: |
| C9815DY | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CPU SYSTEM CLOCK GENERATOR|SSOP|56PIN|PLASTIC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。