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參數(shù)資料
| 型號： | C9810AYB |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大小： | 332K |
| 代理商： | C9810AYB |
+/+
…when timing is critical
C9810
Low EMI Clock Generator for Intel
810 Chipset for Mobile Applications
Advanced Information
IMI Confidential
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
Rev 0.4
8/31/1999
MILPITAS, CA 95035, USA TEL: 408-263-6300, FAX 408-263-6571
Page 11 of 15
http://www.imicorp.com
AC Parameters
133 MHz Host
100 MHz Host
Symbol
Parameter
Min
Max
Min
Max
Units
Notes
TPeriod
CPU(0:1) period
7.5
8.0
10.0
10.5
nS
5, 6, 8
THIGH
CPU(0:1) high time
1.87
-
3.0
-
nS
6,10
TLOW
CPU(0:1) low time
1.67
-
2.8
-
nS
6, 11
Tr / Tf
CPU(0:1) rise and fall times
0.4
1.6
0.4
1.6
nS
6, 7
TSKEW
CPU0 to CPU1 Skew time
-
175
-
175
pS
6, 8, 9
TCCJ
CPU(0:1) Cycle to Cycle Jitter
-
250
-
250
pS
6, 8, 9
TPeriod
SDRAM[0:3] and DCLK period
7.5
8.0
10.0
10.5
nS
5, 6, 8
THIGH
SDRAM[0:3] and DCLK high time
1.87
-
3.0
-
nS
6,10
TLOW
SDRAM[0:3] and DCLK low time
1.67
-
2.8
-
nS
6, 11
Tr / Tf
SDRAM[0:3] and DCLK rise and fall times
0.4
1.6
0.4
1.6
nS
6, 7
TSKEW
SDRAM[0:3] and DCLK Skew time
-
250
-
250
pS
6, 8, 9
TCCJ
SDRAM[0:3], DCLK Cycle to Cycle Jitter
-
250
-
250
pS
6, 8, 9
TPeriod
APIC(0:1) period
60.0
-
60.0
-
nS
5, 6, 8
THIGH
APIC(0:1) high time
25.5
-
25.5
-
nS
6,10
TLOW
APIC(0:1) low time
25.3
-
25.3
N/S
nS
6, 11
Tr / Tf
APIC(0:1) rise and fall times
0.4
1.6
0.4
1.6
nS
6, 7
TCCJ
APIC(0:1) Cycle to Cycle Jitter
-
250
-
250
pS
6, 8, 9
TPeriod
3V66-(0:1) period
15.0
16.0
15.0
16.0
nS
5, 6, 8
THIGH
3V66-(0:1) high time
5.25
-
5.25
-
nS
6,10
TLOW
3V66-(0:1) low time
5.05
-
5.05
-
nS
6, 11
Tr / Tf
3V66-(0:1) rise and fall times
0.4
1.6
0.4
1.6
nS
6, 7
TSKEW
3V66-0 to 3V66-1 Skew time
-
175
-
175
pS
6, 8, 9
TCCJ
3V66-(0:1) Cycle to Cycle Jitter
-
500
-
500
pS
6, 8, 9
TPeriod
PCI(0:6) period
30.0
-
30.0
-
nS
5, 6, 8
THIGH
PCI(0:6) period
12.0
-
12.0
-
nS
6,10
TLOW
PCI(0:6) low time
12.0
-
12.0
-
nS
6, 11
Tr / Tf
PCI(0:6) rise and fall times
0.5
2.0
0.5
2.0
nS
6, 7
TSKEW
(Any PCI clock) to (Any PCI clock)
Skew time
-
500
-
500
pS
6, 8, 9
TCCJ
PCI(0:6) Cycle to Cycle Jitter
-
500
-
500
pS
6, 8, 9
TPeriod
48MHz[0:1] period ( conforms to
+167ppm max)
20.8299
20.8333
20.8299
20.8333
nS
5, 6, 8
Tr / Tf
48MHz[0:1] rise and fall times
1.0
4.0
1.0
4.0
nS
6, 7
TCCJ
48MHz[0:1] Cycle to Cycle Jitter
-
500
-
500
pS
6, 8, 9
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