參數(shù)資料
型號: C3ENPA1-DS
英文描述: 5.0 or 3.3V, 256Kbit (32Kbit x 8) ZEROPOWER® SRAM
中文描述: ? - 3E的網(wǎng)絡(luò)處理器的數(shù)據(jù)資料硅修訂格A1
文件頁數(shù): 19/114頁
文件大?。?/td> 1893K
代理商: C3ENPA1-DS
MOTOROLA GENERAL BUSINESS INFORMATION
C3ENPA1-DS/D REV 03
C3ENPA1-DS/D
Rev 03
Chapter 1
FUNCTIONAL DESCRIPTION
Features
Key features of the C-3e
TM
Network Processor (NP) are its massive processing capabilities
and its high level of functional integration on one chip.
Massive Processing
Power
Operating frequencies: up to 180MHz
3Gbps of bandwidth (for non-blocking throughput)
More than 3,000MIPS of computing power (for adding services throughout the
protocol stack)
Up to 9 million packets per second transmitted at wire speed
17 programmable RISC Cores (for cell/packet forwarding)
32 programmable Serial Data Processors (for processing bit streams)
Up to 133 million table lookups per second
Three internal buses for 46Gbs of aggregate bandwidth
High Functional
Integration
728 pin Ball Grid Array (BGA) package
16 Channel Processors (8 CP
s with full functionality configurable for full I/O or
recirculation, and 8 CP
s with limited functionality configurable only for bit and byte
level recirculation) including:
Embedded OC-3c, OC-12, OC-12c SONET framers
Programmable MAC interface
RISC Cores
Programmable pin PHY interfaces
Embedded coprocessors for table lookup (classification), buffer management (payload
control), and queue management (QoS implementation)
F
n
.
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