
87
L2166_A
I2C Register Denitions
I2C Master Module Software Interface
Bt2166
Graphics/Video Controller
Table 64. I2C Master Read Control Register GRP_I2C_MCTRLR[7:0] Bit Descriptions
Bit
Function
Detail
7
DONE
The DONE bit is set to “1” whenever the I2C master module has nished its current operation
and is ready for another request from the system software. It is set to “0” whenever the I2C
master module is busy servicing a request. This bit can be used by the system software to
determine whether the I2C master module was the source of an interrupt (interrupts enabled) or
to check whether the I2C master nished the current request (software polling, interrupts dis-
abled). This bit is used in the generation of the I2C interrupt (it is ANDed with the INTE interrupt
enable bit together with any outstanding requests in the GRP_I2C_MCTRLW register) but it is
set independently of the value of INTE (interrupt enable). It is set only when all of the request
bits (TSTA, TRAN, RECV and TSTO) in the GRP_I2C_MCTRLW register are cleared.
The DONE bit is set under the following conditions.
TSTA = 1: (Start request) The DONE bit is set after the start token is transmitted.
TRAN = 1: (Transmission request) The DONE bit is set after the data is transmitted and the
acknowledge bit is received.
RECV = 1: (Receive request) The DONE bit is set after the data is received and the acknowl-
edge bit is transmitted. Note that it is impossible to choose the value of the acknowledge bit
dynamically based on the data received.
TSTO = 1: (Stop request) The DONE bit is set after the stop token is transmitted onto the I2C
bus.
LOST = 1: (Arbitration lost) The DONE bit is also set whenever the I2C bus arbitration is lost.
This will clear any outstanding requests in the GRP_I2C_MCTRLW register, i.e., losing bus
arbitration clears the TSTA, TRAN, RECV and TSTO bits.
0 = I2C master module busy
1 = I2C master module nished current operation
6
LOST
Arbitration lost. If the previous action was an I2C transmit, the LOST bit is set when the I2C
master module loses the arbitration process. The I2C arbitration process can also be lost during
a receive action if the master module tries to send a “1” acknowledge and another contending
master tries to send a “0” acknowledge. It is also possible to lose arbitration during the trans-
mission of a stop token onto the I2C bus.
0 = Arbitration not lost
1 = Arbitration lost
5
RACK
Receive acknowledge. The RACK bit contains the value of the acknowledge bit received or
transmitted during the last transmit / receive.
Value of last I2C acknowledge bit received
4
MAST
Master bus. The MAST bit indicates whether the I2C master module is actually the current I2C
bus master (1=master). Once this module becomes bus master it will remain so until either the
system software tells it to release ownership by writing a “1” to the TSTO eld of the
GRP_I2C_MCTRLW register or until it releases ownership due to an arbitration loss.
0 = I2C master module not bus master
1 = I2C master module is bus master
3:0
BITS
Number of bits processed. The BITS value indicates the number of the bit currently being pro-
cessed, as shown in Table 65. Do not assume that an I2C transaction is nished until this eld
has the value of 9 (“1001”). However, the correct way to detect the completion of an I2C trans-
action is when the DONE status bit = 1. This eld is actually the contents of an internal counter
within the I2C master module that counts the number of bits transmitted / received. Thus, in the
case of arbitration loss it will indicate at which bit the arbitration was lost. Number of bits pro-
cessed. See Table 70