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參數(shù)資料
| 型號： | AX88780 |
| 廠商： | ASIX Electronics Corporation |
| 英文描述： | High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller |
| 中文描述： | 高性能非PCI單芯片32位10/100M自適應(yīng)快速以太網(wǎng)控制器 |
| 文件頁數(shù)： | 29/49頁 |
| 文件大?。?/td> | 687K |
| 代理商： | AX88780 |
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AX88780
4.33 TXST--TX Status Register
Offset Address = FC94h Default = 32’h0000_0000
Field
Name
Type
Default
31:4
-
R
All 0’s
3
TXD3FAIL R
0
Description
Reserved
TX Descriptor3 Transmit Fail
When this bit is set 1, it means MAC fails in transmission of descriptor3.
This bit will be self-cleared when driver reads TXST register.
TX Descriptor2 Transmit Fail
When this bit is set 1, it means MAC fails in transmission of descriptor2.
This bit will be self-cleared when driver reads TXST register.
TX Descriptor1 Transmit Fail
When this bit is set 1, it means MAC fails in transmission of descriptor1.
This bit will be self-cleared when driver reads TXST register.
TX Descriptor0 Transmit Fail
When this bit is set 1, it means MAC fails in transmission of descriptor0.
This bit will be self-cleared when driver reads TXST register.
2
TXD2FAIL R
0
1
TXD1FAIL R
0
0
TXD0FAIL R
0
4.34 MDCLKPAT--MDC Clock Pattern Register
Offset Address = FCA0h Default = 32’h0000_8040
Field
Name
Type
Default
31:16
-
R
All 0’s
15:8
-
R/W
8’h80
7:0
MDCPAT R/W
8’h40
Description
Reserved
Reserved, must set to 8’h80 for normal operation
MDC Clock Divide Factor
This field defines the divide factor of host clock. AX88780 will refer to this
field and generate a low speed clock to PHY.
4.35 RXCHKSUMCNT--RX IP/UDP/TCP Checksum Error Counter
Offset Address = FCA4h Default = 32’h0000_0000
Field Name
Type
Default
31:16
-
R
All 0’s Reserved
15:0
RXCHKERCNT R/W
All 0’s RX Checksum Error Counter
If the RXCHKSUM field of RX_CFG register is set to ‘1’, MAC will check
the checksum of IP, TCP or UDP packet. Whenever there is checksum error
detected, this field will be added one.
Description
4.36 RXCRCNT--RX CRC Error Counter
Offset Address = FCA8h Default = 32’h0000_0000
Field
Name
Type
Default
31:16
-
R
All 0’s
15:0
RXCRCCNT R/W
All 0’s
Description
Reserved
RX CRC32 Error Counter
MAC checks the received packet. If there is a CRC error detect, this field
will be added one.
29
ASIX ELECTRONICS CORPORATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AX88790L | 10/100BASE 3-in-1 PCMCIA Fast Ethernet Controller |
| AX88796BLF | IC,MC14411P |
| AX88796BLI | Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller |
| AX88872P | 10/100BASE Dual Speed “Swipeater” Controller |
| AX9902MS | 2N and 2P-Channel Enhancement Mode Power MOSFET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AX88780_07 | 制造商:ASIX 制造商全稱:ASIX 功能描述:High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller |
| AX88782 | 制造商:ASIX 制造商全稱:ASIX 功能描述:ASIX Multi-Port Ethernet Controller |
| AX88783 | 制造商:ASIX 制造商全稱:ASIX 功能描述:ASIX Multi-Port Ethernet Controller |
| AX88790L | 制造商:ASIX 制造商全稱:ASIX 功能描述:10/100BASE 3-in-1 PCMCIA Fast Ethernet Controller |
| AX88796 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-in-1 Local Bus Fast Ethernet Controller |
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