參數(shù)資料
型號: AX88780
廠商: ASIX Electronics Corporation
英文描述: High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller
中文描述: 高性能非PCI單芯片32位10/100M自適應(yīng)快速以太網(wǎng)控制器
文件頁數(shù): 26/49頁
文件大?。?/td> 687K
代理商: AX88780
AX88780
0 = disable (default)
Reserved
Software Reset Internal PHY
Driver set this bit to ‘0’ to reset internal PHY. The reset duration is
depended on whenever this bit is de-asserted by deriver.
1 = in normal operation
0 = in reset status
Software Reset MAC
Driver set this bit to ‘0’ to reset MAC. The reset duration is depended on
whenever this bit is de-asserted by deriver.
1 = in normal operation
0 = in reset status
3:2
1
-
SRST_PHY
R/W
R/W
2’b00
1
0
SRST_MAC
R/W
1
4.24 MACID0--MAC ID0 Register
Offset Address = FC70h Default = 32’h0000_0000
Field Name
Type
Default
31:16
-
R
All 0’s
15:0
MID15_0
R/W
16’h0000 MAC ID Address [15:0].
Description
Reserved.
This field defines lower address bit15 to bit0 of MAC. The MACID0, MACID1
and MACID2 combine into 48-bit MAC address. The MAC address format is
[47:0] = {MACID2[15:0], MACID1[15:0], MACID0[15:0]}. If the EEPROM is
attached, this field will be auto-loaded from EEPROM after hardware reset.
4.25 MACID1--MAC ID1 Register
Offset Address = FC74h Default = 32’h0000_0000
Field
Name
Type
Default
31:16
-
R
All 0’s
15:0
MID31_16 R/W
16’h0000 MAC ID Address [31:16].
Description
Reserved.
4.26 MACID2--MAC ID2 Register
Offset Address = FC78h Default = 32’h0000_0000
Field
Name
Type Default
31:16
-
R
All 0’s
15:0
MID47_32 R/W
16’h0000 MAC ID Address [47:32].
Description
Reserved.
4.27 TXLEN--TX Length Register
Offset Address = FC7Ch Default = 32’h0000_05FC
Field
Name
Type
Default
31:11
-
R
All 0’s
10:0
MAXTXLEN
R/W
11’h5FC Max TX packet size
Description
Reserved
This field defines the maximum raw packet size in transmittance. It is not
included 4 bytes FCS.
26
ASIX ELECTRONICS CORPORATION
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