參數(shù)資料
型號(hào): AX88780
廠商: ASIX Electronics Corporation
英文描述: High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller
中文描述: 高性能非PCI單芯片32位10/100M自適應(yīng)快速以太網(wǎng)控制器
文件頁數(shù): 22/49頁
文件大小: 687K
代理商: AX88780
AX88780
transmitted.
4.11 TXDES3--TX Descriptor3 Register
Address = FC2Ch Default = 32’h0000_0000
Field
Name
Type
Default
31:16
-
R
All 0’s
15
TXD3_EN
R/W
0
Description
Reserved
Transmit TX descriptor3
If this bit is enabled, MAC will begin to transmit data that are stored in TX
buffer. In former, data had been written to TX descriptor3. This bit will be
cleared by hardware when MAC finished the transmission.
1= enable
0= disable
Reserved
TX Packet Length (unit: byte)
Driver set this field to indicate AX88780 how many bytes will be
transmitted.
14:13
12:0
-
R
R/W
2’b00
All 0’s
TXD3_LEN
4.12 RX_CFG--RX Configuration Register
Offset Address = FC30h Default = 32’h0000_0100
Field
Name
Type
Default
31:9
-
R
All 0’s
8
RXFLOW
R/W
1
Description
Reserved
RX Flow Control
To enable RX flow control, driver MUST set this bit and bit5 of
MAC_CFG1.
1 = enable
0 = disable
Reserved.
RX Packet TCP/IP Checksum
When this bit is set, AX88780 will check the checksum of the received
packet that is IP, TCP or UDP packet. If there is checksum error, AX88780
will drop the packet and RXCHKSUMCNT counter will add 1.
1 = enable
0 = disable
Reserved
RX Buffer Protection
When this bit is enabled, MAC will protect the RX buffer to avoid overrun.
For normal operation, this bit should be enabled in initial stage.
1= enable
0= disable
7:5
4
-
R/W
R/W
3’b000
0
RXCHKSUM
3:1
0
-
R/W
R/W
3’b000
0
RXBUFPRO
4.13 RXCURT--RX Current Pointer Register
Offset Address = FC34h Default = 32’h0000_0000
Field
Name
Type
Default
31:11
-
R
All 0’s
10:0
RXCURPTR
R/W
All 0’s
Description
Reserved
RX Line Current Pointer.
Point to the last line that will be written by hardware. The unit of line is 16
bytes. MAC will maintain this register.
22
ASIX ELECTRONICS CORPORATION
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