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參數資料
| 型號： | AX88780 |
| 廠商： | ASIX Electronics Corporation |
| 英文描述： | High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller |
| 中文描述： | 高性能非PCI單芯片32位10/100M自適應快速以太網控制器 |
| 文件頁數： | 25/49頁 |
| 文件大?。?/td> | 687K |
| 代理商： | AX88780 |
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AX88780
4.20 RXBTHD0--RX buffer Threshold0 Register
Offset Address= FC58h Default = 32’h0000_0300
Field
Name
Type
Default
31:11
-
R
All 0’s
10:0
RXLOWB R/W
11’h300
Description
Reserved
RX Low-Bound Threshold for Pause Operation
This field defines the lower-bound threshold of RX buffer for pause
operation. If the flow control is enabled, MAC will refer this field for low
bound. The unit is a 16-byte. Diver can properly set this field for
performance issue. AX88780 is built 32KB buffer for rx operation, so the
combination of RXBTHD0 and RXBTHD1 will affect the performance of
receive.
4.21 RXBTHD1--RX Buffer Threshold1 Register
Offset Address= FC5Ch Default = 32’h0000_0600
Field
Name
Type
Default
31:11
-
R
All 0’s
10:0
RXHIGHB
R/W
11’h600
Description
Reserved
RX Upper-Bound Threshold for Pause Operation
This field defines the upper-bound threshold of rx buffer for pause
operation. If the flow control is enabled, MAC will refer this field for
upper bound. The unit is a 16-byte. Diver can properly set this field for
performance issue.
4.22 RXFULTHD--RX Buffer Full Threshold Register
Offset Address= FC60h Default = 32’h0000_0100
Field
Name
Type
Default
31:11
-
R
All 0’s
10:0
RXFULB
R/W
11’h100
Description
Reserved
RX Full Threshold
This field defines the least capacity of RX buffer. AX88780 will cause RX
full if it remains capacity under this value. The unit is 16-byte.
4.23 MISC—Misc. Control Register
Offset Address= FC68h Default = 32’h0000_0003
Field
Name
Type
Default
31:6
-
R
All 0’s
5
WAKE_LNK
R/W
0
Description
Reserved
WAKE-UP by Link-Up Function
If this bit is enabled, MAC will drive wakeup pin whenever there is link-up
occurrence. The polarity of wakeup pin is according to bit0 of CMD
register.
1= enable
0= disable
WAKE-UP by Magic Packet
If this bit is enabled, MAC will drive wakeup pin whenever there is magic
packet detected by hardware. The polarity of wakeup pin is according to
bit0 of CMD register.
1= enable wake-up by magic packet
4
WAKE_MAG
R/W
0
25
ASIX ELECTRONICS CORPORATION
相關PDF資料 |
PDF描述 |
|---|---|
| AX88790L | 10/100BASE 3-in-1 PCMCIA Fast Ethernet Controller |
| AX88796BLF | IC,MC14411P |
| AX88796BLI | Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller |
| AX88872P | 10/100BASE Dual Speed “Swipeater” Controller |
| AX9902MS | 2N and 2P-Channel Enhancement Mode Power MOSFET |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AX88780_07 | 制造商:ASIX 制造商全稱:ASIX 功能描述:High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller |
| AX88782 | 制造商:ASIX 制造商全稱:ASIX 功能描述:ASIX Multi-Port Ethernet Controller |
| AX88783 | 制造商:ASIX 制造商全稱:ASIX 功能描述:ASIX Multi-Port Ethernet Controller |
| AX88790L | 制造商:ASIX 制造商全稱:ASIX 功能描述:10/100BASE 3-in-1 PCMCIA Fast Ethernet Controller |
| AX88796 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:3-in-1 Local Bus Fast Ethernet Controller |
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