參數(shù)資料
型號(hào)： AU1500PCIPERF_30275A
英文描述： AMD Alchemy? SolutionsAu1500? Processor PCI Bus Performance? 330KB (PDF)
中文描述： 采用AMD Alchemy？ SolutionsAu1500？ PCI總線處理器的性能？ 330KB（PDF格式）
文件頁(yè)數(shù)： 12/18頁(yè)
文件大?。?/td> 128K
代理商： AU1500PCIPERF_30275A
12
Application Note
Rev. 1.3
August 2002
PCI Bus Software Support for the Au1500
In general, standard PCI auto-configuration software works as intended with the Au1500 PCI bus, but
there are a few additional items to take into consideration (these items are handled outside the
standard PCI bus scan):
1.
The Au1500 PCI controller does not respond to a configuration cycle from itself. As such,
the Au1500 memory window is
not
detected during a PCI bus scan.
2.
Devices on the PCI bus which are fast-back-to-back capable should be allocated space in the
area defined by the Au1500 PCI controller back-to-back windows.
The Au1500 PCI controller does not respond to configuration cycles initiated by itself. Consequently,
the PCI auto-configuration software is not aware of the Au1500 memory window. This behavior has
two inter-related side-effects which must be accomodated by software:
The location and size of the Au1500 memory window must be determined in advance, so that...
The PCI auto-configuration software must allocate memory regions that
do not conflict
with the
Au1500 memory window.
PCI auto-configuration software is usually instructed as to the address ranges from which PCI device
memory and I/O addresses can be assigned; therefore, once the Au1500 memory window location (in
PCI space) and size are known, the PCI auto-configuration software must be instructed to avoid the
Au1500 memory window.
The Au1500 PCI controller supports fast back-to-back transactions. The pci_b2bmask, pci_b2bbase0
and pci_b2bbase1 registers form two windows for utilizing fast back-to-back PCI signalling on
outgoing memory transactions. To take advantage of this performance feature, the following must be
accomodated by software:
The location and size of the fast back-to-back windows must be determined in advance, so that...
The PCI auto-configuration software should allocate memory regions from the fast back-to-back win-
dows for devices that advertise the fast back-to-back capability.
During the PCI bus-scan, for those PCI devices that are fast back-to-back capable (Command register
bit 9 is set), the PCI auto-configuration software assigns, if possible, a memory region from the
Au1500 PCI controller fast back-to-back windows. PCI auto-configuration software is usually
instructed as to the address ranges to which fast back-to-back transactions are possible; therefore,
once the Au1500 fast back-to-back windows location (in PCI space) and size are known, the PCI
auto-configuration software is provided the fast back-to-back address range so that fast back-to-back
devices can be assigned base addresses within this range.
Note:
NOTE: When allocating PCI memory addresses, the range 0xC0000000 to 0xDFFFFFFF
may be desirable since a 1:1 processor-to-PCI mapping can be created. More specifically, an
Au1 core access to MIPS KSEG2 virtual address 0xC0000000 can be mapped via TLBs to a
PCI access to 0xC0000000, a 1:1 mapping. In certain software environments this may greatly
simplify accessing the PCI devices (e.g. the PCI device MBAR value can be used as a pointer).
This 512MB address range should easily accomodate most PCI memory space needs (Au1500
memory window, fast back-to-back window and general device memory space).
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