參數(shù)資料
型號(hào)： AT91SAM9XE512-QU
廠商： Atmel
文件頁數(shù)： 81/159頁
文件大小： 0K
描述： MCU ARM9 512K FLASH 208-PQFP
產(chǎn)品培訓(xùn)模塊： MCU Product Line Introduction
標(biāo)準(zhǔn)包裝： 24
系列： SAM9XE
核心處理器： ARM9
芯體尺寸： 16/32-位
速度： 180MHz
連通性： EBI/EMI，以太網(wǎng)，I²C，MMC，SPI，SSC，UART/USART，USB
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 96
程序存儲(chǔ)器容量： 512KB（512K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 56K x 8
電壓 - 電源 (Vcc/Vdd)： 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 208-MQFP，208-PQFP
包裝： 托盤
配用： AT91SAM9XE-EK-ND - KIT EVAL FOR AT91SAM9XE
AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9
PIC16F5X
DS41213D-page 16
2007 Microchip Technology Inc.
3.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers (SFR) are registers
used by the CPU and peripheral functions to control the
operation of the device (Table 3-1).
The Special Function Registers can be classified into
two sets. The Special Function Registers associated
with the “core” functions are described in this section.
Those related to the operation of the peripheral
features are described in the section for each
peripheral feature.
TABLE 3-1:
SPECIAL FUNCTION REGISTER SUMMARY
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Details
on Page
N/A
TRIS
I/O Control Registers (TRISA, TRISB, TRISC, TRISD, TRISE)
1111 1111
N/A
OPTION
Contains control bits to configure Timer0 and Timer0/WDT
prescaler
--11 1111
00h
INDF
Uses contents of FSR to address data memory (not a physical
register)
xxxx xxxx
01h
TMR0
Timer0 Module Register
xxxx xxxx
02h
PCL(1)
Low order 8 bits of PC
1111 1111
03h
STATUS
PA2
PA1
PA0
TO
PD
ZDC
C
0001 1xxx
04h
FSR(3)
Indirect data memory Address Pointer
111x xxxx
04h
FSR(4)
Indirect data memory Address Pointer
1xxx xxxx
04h
FSR(5)
Indirect data memory Address Pointer
xxxx xxxx
05h
PORTA(6)
—
RA3
RA2
RA1
RA0
---- xxxx
06h
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
xxxx xxxx
07h
PORTC(2)
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
xxxx xxxx
08h
PORTD(7)
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
xxxx xxxx
09h
PORTE(6), (7)
RE7
RE6
RE5
RE4
—
xxxx ----
Legend: Shaded cells = unimplemented or unused, – = unimplemented, read as ‘0’ (if applicable), x = unknown,
u
= unchanged
Note 1:
The upper byte of the Program Counter is not directly accessible. See Section 3.5 “Program Counter”
for an explanation of how to access these bits.
2:
File address 07h is a General Purpose Register on the PIC16F54.
3:
PIC16F54 only.
4:
PIC16F57 only.
5:
PIC16F59 only.
6:
Unimplemented bits are read as ‘0’s.
7:
File address 08h and 09h are General Purpose Registers on the PIC16F54 and PIC16F57.
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