AT49BN1604(T)
4
tion mode (see Software product Identification Entry and
Exit sections) a read from address location 00002H within a
sector will show if programming the sector is locked out. If
the data on I/O0 is low, the sector can be programmed; if
the data on I/O0 is high, the program lockout feature has
been enabled and the sector cannot be programmed. The
software product identification exit code should be used to
return to standard operation.
SECTOR PROGRAMMING LOCKOUT OVERRIDE:
The
user can override the sector programming lockout by taking
the RESET pin to 12V ± 0.5 volts. By doing this protected
data can be altered through a chip erase, sector erase or
word programming. When the RESET pin is brought back
to TTL levels, the sector programming lockout feature is
again active.
DATA POLLING:
The AT49BN1604(T) features DATA poll-
ing to indicate the end of a program cycle. During a pro-
gram cycle an attempted read of the last word loaded will
result in the complement of the loaded data on I/O7. Once
the program or erase cycle has been completed, true data
will be read from the device. Data bar polling may begin at
any time during the program cycle. Please see “Status Bit
Table” on page 18 for more details.
TOGGLE BIT:
In addition to DATA bar polling the
AT49BN1604(T) provides another method for determining
the end of a program or erase cycle. During a program or
erase operation, successive attempts to read data from the
device will result in I/O6 toggling between a “1” and “0”.
Once the program cycle has completed, I/O6 will stop tog-
gling and valid data will be read. Examining the toggle bit
may begin at any time during a program cycle.
An additional toggle bit is available on I/O2 which can be
used in conjunction with the toggle bit which is available on
I/O6. While a sector is erase suspended, a read or a pro-
gram operation from the suspended sector will result in the
I/O2 bit toggling. Please see “Status Bit Table” on page 18
for more details.
ERASE SUSPEND/RESUME:
The Erase suspend allows
the user to interrupt a Sector Erase operation and then per-
form a data read on the remaining sectors. This feature is
only allowed during the sector erase operation. The device
will take up to a maximum of 20 μs to suspend the Erase.
To resume the erase operation, the erase resume com-
mand sequence should be written to the device. The sector
erase operation will then continue. Another erase suspend
command can be written after the chip has resumed eras-
ing.
HARDWARE DATA PROTECTION:
Hardware features
protect against inadvertent programs to the
AT49BN1604(T) in the following ways: (a) V
CC
sense: if
V
CC
is below 1.8V (typical), the program function is inhib-
ited. (b) V
CC
power on delay: once V
CC
has reached the
V
CC
sense level, the device will automatically time out 10
ms (typical) before programming. (c) Program inhibit: hold-
ing any one of OE low, CE high or WE high inhibits pro-
gram cycles. (d) Noise filter: pulses of less than 15 ns
(typical) on the WE or CE inputs will not initiate a program
cycle.
INPUT LEVELS:
While operating with a 2.7V to 3.3V
power supply, the address inputs and control inputs (OE,
CE, and WE) may be driven from 0 to 5.5V without
adversely affecting the operation of the device. The I/O
lines can only be driven from 0 to V
CCQ
+ 0.6V.
OUTPUT LEVELS:
Output High Levels (V
OH
) are equal to
V
CCQ
- 0.1V (not V
CC
). For 2.7V - 3.3V output levels, V
CCQ
must be tied to V
CC
. For 1.65V - 2.2V output levels, V
CCQ
must be regulated to 2.0V ± 10% while V
CC
must be regu-
lated to 2.7V - 3.0V (for minimum power).