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參數(shù)資料
| 型號(hào)： | ATF1500 |
| 廠商： | Atmel Corp. |
| 英文描述： | 44-pin Complex PLD(44腳復(fù)雜可編程邏輯器件) |
| 中文描述： | 44引腳復(fù)雜可編程邏輯器件（44腳復(fù)雜可編程邏輯器件） |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 195K |
| 代理商： | ATF1500 |
1
Rev. 0731B–09/99
High-
performance
Flash PLD
Application
Note
The Atmel ATF1500
44-pin Complex PLD
Introduction
The ATF1500 is Atmel
’
s newest Com-
plex PLD. It is a 44-pin device built on an
advanced Flash technology. It has maxi-
mum pin-to-pin delay of 7.5 ns. With 32
I/O macrocells, each containing a flip-
flop, the ATF1500 can easily integrate
several TTL, SSI, MSI and simple PLDs.
In terms of logic density, the ATF1500
provides an intermediate solution
between Atmel
’
s 24-pin ATV750B
(20 flip-flops) and the high-density 44-pin
ATV2500B (48 flip-flops).
The ATF1500 has several power and
speed management options. The
ATF1500L device offers Atmel
’
s unique
low-power standby mode. When there
are no input transitions, the
“
L
”
device
will automatically power-down to a low-
power mode. In addition, the ATF1500
has an optional pin-controlled power-
down mode. In this mode, one of the
pins is configured as a power-down pin.
A high signal on this pin will put the
device into a zero-power mode (typically
in the (A range).
For software support, Atmel developed
an ATF1500 fitter that interfaces with
industry-standard PLD tools such as
ABEL, CUPL and Synario. Atmel offers
its own versions of these tools at a
reduced cost. For converting existing
designs, Atmel provides a POF2JED util-
ity that reads a POF programming file
and creates an ATF1500 JEDEC file.
Architecture Overview
The ATF1500 has 32 I/O pins and
4 input-only pins. Each I/O pin is associ-
ated with a logic macrocell containing a
flip-flop. Each flip-flop is configurable as
a D- or T-type register, or transparent
latch. Each macrocell also has a buried
feedback, allowing the macrocell logic to
be used even if the I/O pin is used as an
input. All the macrocells are connected
by a global bus that routes all inputs,
I/Os and macrocell feedbacks signals to
every macrocell in the device.
Each ATF1500 macrocell contains five
product terms. Additional logic requiring
more product terms can be implemented
using either Cascade or Foldback Logic.
The Cascade Logic allows logic product
terms to be borrowed from an adjacent
macrocell. Up to eight macrocells can be
cascaded together to create a sum term
of up to 40 product terms. The Foldback
Logic term implements a NAND function.
There is a Foldback Logic term in each
macrocell, providing up to 32 NAND
functions in the device. Both logic expan-
sion methods are automatically
implemented by the ATF1500 fitter, and
each incurs a small propagation delay.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ATF1500-7AC | 制造商:Atmel Corporation 功能描述: |
| ATF1500A | 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:Highperformance EPLD |
| ATF1500A(L) | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:ATF1500A(L) [Updated 6/99. 17 Pages] 1500 gate electrically erasable CPLD. 44 pins |
| ATF1500A_05 | 制造商:ATMEL 制造商全稱(chēng):ATMEL Corporation 功能描述:Highperformance EPLD |
| ATF1500A-10AC | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD 32 MACROCELL CMPTBLE w/F1500 RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類(lèi)型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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