1
Features
4.5V to 5.5V Read/Write
Access Time – 90 ns
Sector Erase Architecture
– Thirty 32K Word (64K byte) Sectors with Individual Write Lockout
– Eight 4K Word (8K byte) Sectors with Individual Write Lockout
– Two 16K Word (32K byte) Sectors with Individual Write Lockout
Fast Word Program Time – 10 μs
Fast Sector Erase Time – 200 ms
Dual-plane Organization, Permitting Concurrent Read while Program/Erase
Memory Plane A: Eight 4K Word, Two 16K Word and Six 32K Word Sectors
Memory Plane B: Twenty-four 32K Word Sectors
Erase Suspend Capability
– Supports Reading/Programming Data from Any Sector by Suspending Erase of
Any Different Sector
Low-power Operation
– 60 mA Active
– 3 mA Standby
DATA Polling, Toggle Bit, Ready/Busy for End of Program Detection
RESET Input for Device Initialization
Sector Program Unlock Command
TSOP, CBGA and μBGA Package Options
Top or Bottom Boot Block Configuration Available
Description
The AT49F16X4(T) is a 5.0-volt 16-megabit Flash memory organized as 1,048,576
words of 16 bits each or 2,097,152 bytes of 8 bits each. The x16 data appears on
I/O0 - I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided into 40 sec-
tors for erase operations. The device is offered in 48-lead TSOP and 48-ball μBGA
packages. The device has CE and OE control signals to avoid any bus contention.
This device can be read or reprogrammed using a single 5.0V power supply, making it
ideally suited for in-system programming.
The device powers on in the read mode. Command sequences are used to place the
device in other operation modes such as program and erase. The device has the
Rev. 0977J–04/00
16-megabit
(1M x 16/2M x 8)
5-volt Only
Flash Memory
AT49F1604
AT49F1604T
AT49F1614
AT49F1614T
Not Recommended for
New Designs
Pin Configurations
Pin Name
Function
A0 - A19
Addresses
CE
Chip Enable
OE
Output Enable
WE
Write Enable
RESET
Reset
RDY/BUSY
READY/BUSY Output
I/O0 - I/O14
Data Inputs/Outputs
I/O15 (A-1)
I/O15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
BYTE
Selects Byte or Word Mode
NC
No Connect
DC
Don’t Connect
(continued)