參數(shù)資料
型號(hào): AS4LC8M8S0-10TC
廠(chǎng)商: ALLIANCE SEMICONDUCTOR CORP
元件分類(lèi): DRAM
英文描述: 3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM
中文描述: 8M X 8 SYNCHRONOUS DRAM, 6 ns, PDSO54
封裝: 0.400 INCH, PLASTIC, TSOP2-54
文件頁(yè)數(shù): 12/24頁(yè)
文件大?。?/td> 566K
代理商: AS4LC8M8S0-10TC
12
ALLIANCE SEMICONDUCTOR
7/5/00
AS4LC4M16S0
AS4LC16M4S0
Mode register set command waveform
MRS can be issued only when both banks are idle.
Precharge waveforms
Precharge can be asserted after t
RAS
(min). The selected bank will enter the idle state after t
RP
.. The earliest assertion of the
precharge command without losing any burst data is show below.
(normal write; BL = 4)
(normal read; BL = 4)
Auto precharge waveforms
A10 controls the selection of auto precharge during the read or write command cycle.
(write with auto precharge; BL = 4)
(read with auto precharge; BL = 4)
*
The row active command of the precharge bank can be issued after t
RP
from this point. At burst read/write with auto precharge, CAS interrupt of the same
bank is illegal; other bank is described below.
CLK
CMD
PRE
MRS
ACT
t
RP
t
RSC
(min)
CLK
CMD
DQ
WE
D
0
D
1
D
2
D
3
PRE
CLK
CMD
DQ(CL2)
DQ(CL3)
Read data
PRE
Q
0
Q
1
Q
2
Q
3
Q
0
Q
1
Q
2
Q
3
CLK
CMD
DQ
WE
D
0
D
1
D
2
D
3
Auto precharge starts*
Auto precharge starts*
CLK
CMD
DQ(CL2)
DQ(CL3)
Read data
Q
0
Q
1
Q
2
Q
3
Q
0
Q
1
Q
2
Q
3
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AS4LC8M8S0-75TC 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM
AS4LC8M8S0-8TC 制造商:ALSC 制造商全稱(chēng):Alliance Semiconductor Corporation 功能描述:3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM
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