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參數(shù)資料
| 型號(hào)： | AO4918 |
| 廠商： | ALPHA |
| 英文描述： | Asymmetric Dual N-Channel Enhancement Mode Field Effect Transistor |
| 中文描述： | 非對(duì)稱雙N溝道增強(qiáng)型場(chǎng)效應(yīng)晶體管 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 156K |
| 代理商： | AO4918 |
AO4918
Symbol
STATIC PARAMETERS
Min
Typ
Max
Units
BV
DSS
30
V
0.007
0.05
3.2
12
10
20
100
2
I
GSS
V
GS(th)
I
D(ON)
nA
V
A
0.6
40
1.1
11.7
15.4
13.1
37
0.46
14.5
19
16
T
J
=125°C
m
g
FS
V
SD
I
S
DYNAMIC PARAMETERS
Input Capacitance
Output Capacitance (FET + Schottky)
Reverse Transfer Capacitance
30
S
V
A
0.5
3.5
C
iss
C
oss
C
rss
R
g
SWITCHING PARAMETERS
Total Gate Charge
3740
295
186
0.86
4488
pF
pF
pF
1.1
Q
g
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
30.5
4.5
8.5
6
8.2
54.5
10.5
23.5
13.3
37
nC
nC
nC
ns
ns
ns
ns
ns
nC
9
12
75
15
28
16
Body Diode + Schottky Reverse Recovery Time
Body Diode + Schottky Reverse Recovery Charge
I
F
=9.3A, dI/dt=100A/
μ
s
I
F
=9.3A, dI/dt=100A/
μ
s
THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
Turn-Off Fall Time
V
GS
=10V, V
DS
=15V, R
L
=1.6
,
R
GEN
=3
V
GS
=4.5V, V
DS
=15V, I
D
=9.3A
Gate resistance
V
GS
=0V, V
DS
=0V, f=1MHz
Forward Transconductance
Diode+Schottky Forward Voltage
Maximum Body-Diode+Schottky Continuous Current
V
DS
=5V, I
D
=9.3A
I
S
=1A
V
GS
=0V, V
DS
=15V, f=1MHz
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
=10V, I
D
=9.3A
m
V
GS
=4.5V, I
D
=8.8A
Gate Threshold Voltage
On state drain current
V
DS
=V
GS
I
D
=250
μ
A
V
GS
=4.5V, V
DS
=5V
mA
Gate-Body leakage current
V
DS
=0V, V
GS
= ±12V
V
R
=30V, T
J
=125°C
V
R
=30V, T
J
=150°C
Drain-Source Breakdown Voltage
I
D
=250
μ
A, V
GS
=0V
V
R
=30V
I
DSS
Zero Gate Voltage Drain Current.
(Set by Schottky leakage)
Q1 Electrical Characteristics (T
J
=25°C unless otherwise noted)
Parameter
Conditions
A: The value of R
θ
JA
is measured with the device mounted on 1in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The value in any
given application depends on the user's specific board design. The current rating is based on the t
≤
10s thermal resistance rating.
B: Repetitive rating, pulse width limited by junction temperature.
C. The R
θ
JA
is the sum of the thermal impedence from junction to lead R
θ
JL
and lead to ambient.
D. The static characteristics in Figures 1 to 6,12,14 are obtained using 80
μ
s pulses, duty cycle 0.5% max.
E. These tests are performed with the device mounted on 1 in
2
FR-4 board with 2oz. Copper, in a still air environment with T
A
=25°C. The SOA curve
provides a single pulse rating.
F. The Schottky appears in parallel with the MOSFET body diode, even though it is a separate chip. Therefore, we provide the net forward drop, capacitance
and recovery characteristics of the MOSFET and Schottky. However, the thermal resistance is specified for each chip separately
Rev4: August 2005
.
Alpha Omega Semiconductor, Ltd.
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